Message ID | 1439211912-10085-9-git-send-email-sjg@chromium.org |
---|---|
State | Accepted |
Delegated to: | Simon Glass |
Headers | show |
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass <sjg@chromium.org> wrote: > We should signal to the FSP that PCI enumeration is complete. Perform this > task in a suitable place. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v3: > - Drop interrupt.h header include > > Changes in v2: > - Add new patch to tidy up interrupt and FSP init > > arch/x86/cpu/baytrail/valleyview.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c > index 225ea38..2d5a0eb 100644 > --- a/arch/x86/cpu/baytrail/valleyview.c > +++ b/arch/x86/cpu/baytrail/valleyview.c > @@ -9,6 +9,7 @@ > #include <pci_ids.h> > #include <asm/irq.h> > #include <asm/post.h> > +#include <asm/fsp/fsp_support.h> > > static struct pci_device_id mmc_supported[] = { > { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO }, > @@ -40,6 +41,12 @@ int arch_cpu_init(void) > > int arch_misc_init(void) > { > - return pirq_init(); > + int ret; > + > + ret = pirq_init(); > + if (ret) > + return ret; > + > + return fsp_init_phase_pci(); > } > #endif > -- Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On 10 August 2015 at 23:16, Bin Meng <bmeng.cn@gmail.com> wrote: > On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass <sjg@chromium.org> wrote: >> We should signal to the FSP that PCI enumeration is complete. Perform this >> task in a suitable place. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> >> --- >> >> Changes in v3: >> - Drop interrupt.h header include >> >> Changes in v2: >> - Add new patch to tidy up interrupt and FSP init >> >> arch/x86/cpu/baytrail/valleyview.c | 9 ++++++++- >> 1 file changed, 8 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c >> index 225ea38..2d5a0eb 100644 >> --- a/arch/x86/cpu/baytrail/valleyview.c >> +++ b/arch/x86/cpu/baytrail/valleyview.c >> @@ -9,6 +9,7 @@ >> #include <pci_ids.h> >> #include <asm/irq.h> >> #include <asm/post.h> >> +#include <asm/fsp/fsp_support.h> >> >> static struct pci_device_id mmc_supported[] = { >> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO }, >> @@ -40,6 +41,12 @@ int arch_cpu_init(void) >> >> int arch_misc_init(void) >> { >> - return pirq_init(); >> + int ret; >> + >> + ret = pirq_init(); >> + if (ret) >> + return ret; >> + >> + return fsp_init_phase_pci(); >> } >> #endif >> -- > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Applied to u-boot-x86
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index 225ea38..2d5a0eb 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -9,6 +9,7 @@ #include <pci_ids.h> #include <asm/irq.h> #include <asm/post.h> +#include <asm/fsp/fsp_support.h> static struct pci_device_id mmc_supported[] = { { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO }, @@ -40,6 +41,12 @@ int arch_cpu_init(void) int arch_misc_init(void) { - return pirq_init(); + int ret; + + ret = pirq_init(); + if (ret) + return ret; + + return fsp_init_phase_pci(); } #endif
We should signal to the FSP that PCI enumeration is complete. Perform this task in a suitable place. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: - Drop interrupt.h header include Changes in v2: - Add new patch to tidy up interrupt and FSP init arch/x86/cpu/baytrail/valleyview.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)