diff mbox

[for-2.5,27/30] m68k: add addx/subx/negx

Message ID 1439151229-27747-28-git-send-email-laurent@vivier.eu
State New
Headers show

Commit Message

Laurent Vivier Aug. 9, 2015, 8:13 p.m. UTC 
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target-m68k/helper.c    |  96 ++++++++++++++++++---------------
 target-m68k/helper.h    |   8 ++-
 target-m68k/translate.c | 141 ++++++++++++++++++++++++++++++++++++++++++++----
 3 files changed, 192 insertions(+), 53 deletions(-)

Comments

Richard Henderson Aug. 12, 2015, 6:46 p.m. UTC | #1 
On 08/09/2015 01:13 PM, Laurent Vivier wrote:
> +    return (op1 & ~((1UL << bits) - 1)) | res;                          \

deposit32(op1, res, bits, 0)

Otherwise,

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~
Laurent Vivier Aug. 13, 2015, 12:11 a.m. UTC | #2 
Le 12/08/2015 20:46, Richard Henderson a écrit :
> On 08/09/2015 01:13 PM, Laurent Vivier wrote:
>> +    return (op1 & ~((1UL << bits) - 1)) | res; \
> 
> deposit32(op1, res, bits, 0)
> 

You mean: deposit32(op1, 0, bits, res) ?

Laurent
Richard Henderson Aug. 13, 2015, 2:23 a.m. UTC | #3 
On 08/12/2015 05:11 PM, Laurent Vivier wrote:
>
>
> Le 12/08/2015 20:46, Richard Henderson a écrit :
>> On 08/09/2015 01:13 PM, Laurent Vivier wrote:
>>> +    return (op1 & ~((1UL << bits) - 1)) | res; \
>>
>> deposit32(op1, res, bits, 0)
>>
>
> You mean: deposit32(op1, 0, bits, res) ?

Yes, sorry.  The operand order is different for tcg_gen_deposit_i32.  ;-)


r~
diff mbox

Patch

diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index f4be52b..1360b2c 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -419,52 +419,64 @@  uint32_t HELPER(sats)(uint32_t val, uint32_t ccr)
     return val;
 }
 
-uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
-{
-    uint32_t res;
-    uint32_t old_flags;
-
-    old_flags = env->cc_dest;
-    if (env->cc_x) {
-        env->cc_x = (op1 <= op2);
-        env->cc_op = CC_OP_SUBX;
-        res = op1 - (op2 + 1);
-    } else {
-        env->cc_x = (op1 < op2);
-        env->cc_op = CC_OP_SUB;
-        res = op1 - op2;
-    }
-    env->cc_dest = res;
-    env->cc_src = op2;
-    cpu_m68k_flush_flags(env, env->cc_op);
-    /* !Z is sticky.  */
-    env->cc_dest &= (old_flags | ~CCF_Z);
-    return res;
+#define HELPER_SUBX(type, bits, size) \
+uint32_t HELPER(glue(glue(subx, bits), _cc))(CPUM68KState *env,         \
+                                            uint32_t op1, uint32_t op2) \
+{                                                                       \
+    type res;                                                           \
+    uint32_t old_flags;                                                 \
+    int op;                                                             \
+    old_flags = env->cc_dest;                                           \
+    if (env->cc_x) {                                                    \
+        env->cc_x = ((type)op1 <= (type)op2);                           \
+        op = glue(CC_OP_SUBX, size);                                    \
+        res = (type)op1 - ((type)op2 + 1);                              \
+    } else {                                                            \
+        env->cc_x = ((type)op1 < (type)op2);                            \
+        op = glue(CC_OP_SUB, size);                                     \
+        res = (type)op1 - (type)op2;                                    \
+    }                                                                   \
+    env->cc_dest = res;                                                 \
+    env->cc_src = (type)op2;                                            \
+    env->cc_dest = cpu_m68k_flush_flags(env, op);                       \
+    /* !Z is sticky.  */                                                \
+    env->cc_dest &= (old_flags | ~CCF_Z);                               \
+    return (op1 & ~((1UL << bits) - 1)) | res;                          \
 }
 
-uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
-{
-    uint32_t res;
-    uint32_t old_flags;
-
-    old_flags = env->cc_dest;
-    if (env->cc_x) {
-        res = op1 + op2 + 1;
-        env->cc_x = (res <= op2);
-        env->cc_op = CC_OP_ADDX;
-    } else {
-        res = op1 + op2;
-        env->cc_x = (res < op2);
-        env->cc_op = CC_OP_ADD;
-    }
-    env->cc_dest = res;
-    env->cc_src = op2;
-    cpu_m68k_flush_flags(env, env->cc_op);
-    /* !Z is sticky.  */
-    env->cc_dest &= (old_flags | ~CCF_Z);
-    return res;
+HELPER_SUBX(uint8_t, 8, B)
+HELPER_SUBX(uint16_t, 16, W)
+HELPER_SUBX(uint32_t, 32, )
+
+#define HELPER_ADDX(type, bits, size) \
+uint32_t HELPER(glue(glue(addx, bits), _cc))(CPUM68KState *env,         \
+                                            uint32_t op1, uint32_t op2) \
+{                                                                       \
+    type res;                                                           \
+    uint32_t old_flags;                                                 \
+    int op;                                                             \
+    old_flags = env->cc_dest;                                           \
+    if (env->cc_x) {                                                    \
+        res = (type)op1 + (type)op2 + 1;                                \
+        env->cc_x = (res <= (type)op2);                                 \
+        op = glue(CC_OP_ADDX, size);                                    \
+    } else {                                                            \
+        res = (type)op1 + (type)op2;                                    \
+        env->cc_x = (res < (type)op2);                                  \
+        op = glue(CC_OP_ADD, size);                                     \
+    }                                                                   \
+    env->cc_dest = res;                                                 \
+    env->cc_src = (type)op2;                                            \
+    env->cc_dest = cpu_m68k_flush_flags(env, op);                       \
+    /* !Z is sticky.  */                                                \
+    env->cc_dest &= (old_flags | ~CCF_Z);                               \
+    return (op1 & ~((1UL << bits) - 1)) | res;                          \
 }
 
+HELPER_ADDX(uint8_t, 8, B)
+HELPER_ADDX(uint16_t, 16, W)
+HELPER_ADDX(uint32_t, 32, )
+
 uint32_t HELPER(xflag_lt_i8)(uint32_t a, uint32_t b)
 {
     return (uint8_t)a < (uint8_t)b;
diff --git a/target-m68k/helper.h b/target-m68k/helper.h
index de4d84d..61e335d 100644
--- a/target-m68k/helper.h
+++ b/target-m68k/helper.h
@@ -9,8 +9,12 @@  DEF_HELPER_3(mulu32_cc, i32, env, i32, i32)
 DEF_HELPER_3(muls32_cc, i32, env, i32, i32)
 DEF_HELPER_3(mulu64, i32, env, i32, i32)
 DEF_HELPER_3(muls64, i32, env, i32, i32)
-DEF_HELPER_3(addx_cc, i32, env, i32, i32)
-DEF_HELPER_3(subx_cc, i32, env, i32, i32)
+DEF_HELPER_3(addx8_cc, i32, env, i32, i32)
+DEF_HELPER_3(addx16_cc, i32, env, i32, i32)
+DEF_HELPER_3(addx32_cc, i32, env, i32, i32)
+DEF_HELPER_3(subx8_cc, i32, env, i32, i32)
+DEF_HELPER_3(subx16_cc, i32, env, i32, i32)
+DEF_HELPER_3(subx32_cc, i32, env, i32, i32)
 DEF_HELPER_3(shl_cc, i32, env, i32, i32)
 DEF_HELPER_3(shr_cc, i32, env, i32, i32)
 DEF_HELPER_3(sar_cc, i32, env, i32, i32)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index ad11457..bac33ef 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1717,11 +1717,28 @@  DISAS_INSN(move)
 
 DISAS_INSN(negx)
 {
-    TCGv reg;
+    TCGv src;
+    TCGv dest;
+    TCGv addr;
+    int opsize;
 
+    opsize = insn_opsize(insn, 6);
     gen_flush_flags(s);
-    reg = DREG(insn, 0);
-    gen_helper_subx_cc(reg, cpu_env, tcg_const_i32(0), reg);
+    SRC_EA(env, src, opsize, -1, &addr);
+    dest = tcg_temp_new();
+    switch (opsize) {
+    case OS_BYTE:
+        gen_helper_subx8_cc(dest, cpu_env, tcg_const_i32(0), src);
+        break;
+    case OS_WORD:
+        gen_helper_subx16_cc(dest, cpu_env, tcg_const_i32(0), src);
+        break;
+    case OS_LONG:
+        gen_helper_subx32_cc(dest, cpu_env, tcg_const_i32(0), src);
+        break;
+    }
+    DEST_EA(env, insn, opsize, dest, &addr);
+    set_cc_op(s, CC_OP_FLAGS);
 }
 
 DISAS_INSN(lea)
@@ -2183,15 +2200,65 @@  DISAS_INSN(suba)
     tcg_gen_sub_i32(reg, reg, src);
 }
 
-DISAS_INSN(subx)
+DISAS_INSN(subx_reg)
 {
     TCGv reg;
     TCGv src;
+    int opsize;
+
+    opsize = insn_opsize(insn, 6);
 
     gen_flush_flags(s);
     reg = DREG(insn, 9);
     src = DREG(insn, 0);
-    gen_helper_subx_cc(reg, cpu_env, reg, src);
+    switch (opsize) {
+    case OS_BYTE:
+        gen_helper_subx8_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_WORD:
+        gen_helper_subx16_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_LONG:
+        gen_helper_subx32_cc(reg, cpu_env, reg, src);
+        break;
+    }
+    set_cc_op(s, CC_OP_FLAGS);
+}
+
+DISAS_INSN(subx_mem)
+{
+    TCGv src;
+    TCGv addr_src;
+    TCGv reg;
+    TCGv addr_reg;
+    int opsize;
+
+    opsize = insn_opsize(insn, 6);
+
+    gen_flush_flags(s);
+
+    addr_src = AREG(insn, 0);
+    tcg_gen_subi_i32(addr_src, addr_src, opsize);
+    src = gen_load(s, opsize, addr_src, 0);
+
+    addr_reg = AREG(insn, 9);
+    tcg_gen_subi_i32(addr_reg, addr_reg, opsize);
+    reg = gen_load(s, opsize, addr_reg, 0);
+
+    switch (opsize) {
+    case OS_BYTE:
+        gen_helper_subx8_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_WORD:
+        gen_helper_subx16_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_LONG:
+        gen_helper_subx32_cc(reg, cpu_env, reg, src);
+        break;
+    }
+    set_cc_op(s, CC_OP_FLAGS);
+
+    gen_store(s, opsize, addr_reg, reg);
 }
 
 DISAS_INSN(mov3q)
@@ -2344,15 +2411,64 @@  DISAS_INSN(adda)
     tcg_gen_add_i32(reg, reg, src);
 }
 
-DISAS_INSN(addx)
+DISAS_INSN(addx_reg)
 {
     TCGv reg;
     TCGv src;
+    int opsize;
+
+    opsize = insn_opsize(insn, 6);
 
     gen_flush_flags(s);
     reg = DREG(insn, 9);
     src = DREG(insn, 0);
-    gen_helper_addx_cc(reg, cpu_env, reg, src);
+    switch (opsize) {
+    case OS_BYTE:
+        gen_helper_addx8_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_WORD:
+        gen_helper_addx16_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_LONG:
+        gen_helper_addx32_cc(reg, cpu_env, reg, src);
+        break;
+    }
+    set_cc_op(s, CC_OP_FLAGS);
+}
+
+DISAS_INSN(addx_mem)
+{
+    TCGv src;
+    TCGv addr_src;
+    TCGv reg;
+    TCGv addr_reg;
+    int opsize;
+
+    opsize = insn_opsize(insn, 6);
+
+    gen_flush_flags(s);
+
+    addr_src = AREG(insn, 0);
+    tcg_gen_subi_i32(addr_src, addr_src, opsize);
+    src = gen_load(s, opsize, addr_src, 0);
+
+    addr_reg = AREG(insn, 9);
+    tcg_gen_subi_i32(addr_reg, addr_reg, opsize);
+    reg = gen_load(s, opsize, addr_reg, 0);
+
+    switch (opsize) {
+    case OS_BYTE:
+        gen_helper_addx8_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_WORD:
+        gen_helper_addx16_cc(reg, cpu_env, reg, src);
+        break;
+    case OS_LONG:
+        gen_helper_addx32_cc(reg, cpu_env, reg, src);
+        break;
+    }
+
+    gen_store(s, opsize, addr_reg, reg);
     set_cc_op(s, CC_OP_FLAGS);
 }
 
@@ -3343,6 +3459,8 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(move,      3000, f000, M68000);
     INSN(strldsr,   40e7, ffff, CF_ISA_APLUSC);
     INSN(negx,      4080, fff8, CF_ISA_A);
+    INSN(negx,      4000, ff00, M68000);
+    INSN(undef,     40c0, ffc0, M68000);
     INSN(move_from_sr, 40c0, fff8, CF_ISA_A);
     INSN(move_from_sr, 40c0, ffc0, M68000);
     INSN(lea,       41c0, f1c0, CF_ISA_A);
@@ -3442,8 +3560,11 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(sbcd_mem,  8108, f1f8, M68000);
     INSN(addsub,    9000, f000, CF_ISA_A);
     INSN(addsub,    9000, f000, M68000);
-    INSN(subx,      9180, f1f8, CF_ISA_A);
+    INSN(subx_reg,  9180, f1f8, CF_ISA_A);
+    INSN(subx_reg,  9100, f138, M68000);
+    INSN(subx_mem,  9108, f138, M68000);
     INSN(suba,      91c0, f1c0, CF_ISA_A);
+    INSN(suba,      90c0, f0c0, M68000);
 
     INSN(undef_mac, a000, f000, CF_ISA_A);
     INSN(undef_mac, a000, f000, M68000);
@@ -3477,7 +3598,9 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(abcd_mem,  c108, f1f8, M68000);
     INSN(addsub,    d000, f000, CF_ISA_A);
     INSN(addsub,    d000, f000, M68000);
-    INSN(addx,      d180, f1f8, CF_ISA_A);
+    INSN(addx_reg,  d180, f1f8, CF_ISA_A);
+    INSN(addx_reg,  d100, f138, M68000);
+    INSN(addx_mem,  d108, f138, M68000);
     INSN(adda,      d1c0, f1c0, CF_ISA_A);
     INSN(adda,      d0c0, f0c0, M68000);
     INSN(shift_im,  e080, f0f0, CF_ISA_A);