Patchwork [v3,3/6] Modifies wrapper functions for byte-based phys_ram_dirty bitmap to bit-based phys_ram_dirty bitmap.

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Submitter Yoshiaki Tamura
Date April 19, 2010, 9:43 a.m.
Message ID <1271670198-12793-4-git-send-email-tamura.yoshiaki@lab.ntt.co.jp>
Download mbox | patch
Permalink /patch/50434/
State New
Headers show

Comments

Yoshiaki Tamura - April 19, 2010, 9:43 a.m.
MASTER works as a buffer, and upon get_diry() or get_dirty_flags(), it calls
cpu_physical_memory_sync_master() to update VGA and MIGRATION.

Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp>
---
 cpu-all.h |   96 +++++++++++++++++++++++++++++++++++++++++++++++++++---------
 1 files changed, 81 insertions(+), 15 deletions(-)

Patch

diff --git a/cpu-all.h b/cpu-all.h
index 8c2d678..2478887 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -907,43 +907,109 @@  static inline int idx_to_flag(int idx)
 /* read dirty bit (return 0 or 1) */
 static inline int cpu_physical_memory_is_dirty(ram_addr_t addr)
 {
-    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
+    unsigned long mask;
+    ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+    int offset = (addr >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+ 
+    mask = 1UL << offset;
+    return (phys_ram_dirty[MASTER_DIRTY_IDX][index] & mask) == mask;
+}
+
+static inline void cpu_physical_memory_sync_master(ram_addr_t index)
+{
+    if (phys_ram_dirty[MASTER_DIRTY_IDX][index]) {
+        phys_ram_dirty[VGA_DIRTY_IDX][index]
+            |=  phys_ram_dirty[MASTER_DIRTY_IDX][index];
+        phys_ram_dirty[MIGRATION_DIRTY_IDX][index]
+            |=  phys_ram_dirty[MASTER_DIRTY_IDX][index];
+        phys_ram_dirty[MASTER_DIRTY_IDX][index] = 0UL;
+    }
 }
 
 static inline int cpu_physical_memory_get_dirty_flags(ram_addr_t addr)
 {
-    return phys_ram_dirty[addr >> TARGET_PAGE_BITS];
+     unsigned long mask;
+     ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+     int offset = (addr >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+     int ret = 0, i;
+ 
+     mask = 1UL << offset;
+     cpu_physical_memory_sync_master(index);
+
+     for (i = VGA_DIRTY_IDX; i <= MIGRATION_DIRTY_IDX; i++) {
+         if (phys_ram_dirty[i][index] & mask) {
+             ret |= idx_to_flag(i);
+         }
+     }
+ 
+     return ret;
+}
+
+static inline int cpu_physical_memory_get_dirty_idx(ram_addr_t addr,
+                                                    int dirty_idx)
+{
+    unsigned long mask;
+    ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+    int offset = (addr >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+
+    mask = 1UL << offset;
+    cpu_physical_memory_sync_master(index);
+    return (phys_ram_dirty[dirty_idx][index] & mask) == mask;
 }
 
 static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
                                                 int dirty_flags)
 {
-    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
+    return cpu_physical_memory_get_dirty_idx(addr, flag_to_idx(dirty_flags));
 }
 
 static inline void cpu_physical_memory_set_dirty(ram_addr_t addr)
 {
-    phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
+    unsigned long mask;
+    ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+    int offset = (addr >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+
+    mask = 1UL << offset;
+    phys_ram_dirty[MASTER_DIRTY_IDX][index] |= mask;
 }
 
-static inline int cpu_physical_memory_set_dirty_flags(ram_addr_t addr,
-                                                      int dirty_flags)
+static inline void cpu_physical_memory_set_dirty_range(ram_addr_t addr,
+                                                       unsigned long mask)
 {
-    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] |= dirty_flags;
+    ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+
+    phys_ram_dirty[MASTER_DIRTY_IDX][index] |= mask;
+}
+
+static inline void cpu_physical_memory_set_dirty_flags(ram_addr_t addr,
+                                                       int dirty_flags)
+{
+    unsigned long mask;
+    ram_addr_t index = (addr >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+    int offset = (addr >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+
+    mask = 1UL << offset;
+    phys_ram_dirty[MASTER_DIRTY_IDX][index] |= mask;
+
+    if (dirty_flags & CODE_DIRTY_FLAG) {
+        phys_ram_dirty[CODE_DIRTY_IDX][index] |= mask;
+    }
 }
 
 static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start,
-                                                        int length,
+                                                        unsigned long length,
                                                         int dirty_flags)
 {
-    int i, mask, len;
-    uint8_t *p;
+    ram_addr_t addr = start, index;
+    unsigned long mask;
+    int offset, i;
 
-    len = length >> TARGET_PAGE_BITS;
-    mask = ~dirty_flags;
-    p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);
-    for (i = 0; i < len; i++)
-        p[i] &= mask;
+    for (i = 0;  i < length; i += TARGET_PAGE_SIZE) {
+        index = ((addr + i) >> TARGET_PAGE_BITS) / HOST_LONG_BITS;
+        offset = ((addr + i) >> TARGET_PAGE_BITS) & (HOST_LONG_BITS - 1);
+        mask = ~(1UL << offset);
+        phys_ram_dirty[flag_to_idx(dirty_flags)][index] &= mask;
+     }
 }
 
 void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,