@@ -359,6 +359,7 @@ struct nandsim {
/* NAND flash "geometry" */
struct {
uint64_t totsz; /* total flash size, bytes */
+ uint32_t chipsz; /* each chip size, bytes */
uint32_t secsz; /* flash sector (erase block) size, bytes */
uint pgsz; /* NAND flash page size, bytes */
uint oobsz; /* page OOB area size, bytes */
@@ -700,6 +701,7 @@ static int init_nandsim(struct mtd_info *mtd)
/* Initialize the NAND flash parameters */
ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
ns->geom.totsz = mtd->size;
+ ns->geom.chipsz = chip->chipsize;
ns->geom.pgsz = mtd->writesize;
ns->geom.oobsz = mtd->oobsize;
ns->geom.secsz = mtd->erasesize;
@@ -727,7 +729,7 @@ static int init_nandsim(struct mtd_info *mtd)
}
if (ns->options & OPT_SMALLPAGE) {
- if (ns->geom.totsz <= (32 << 20)) {
+ if (ns->geom.chipsz <= (32 << 20)) {
ns->geom.pgaddrbytes = 3;
ns->geom.secaddrbytes = 2;
} else {
@@ -735,7 +737,7 @@ static int init_nandsim(struct mtd_info *mtd)
ns->geom.secaddrbytes = 3;
}
} else {
- if (ns->geom.totsz <= (128 << 20)) {
+ if (ns->geom.chipsz <= (128 << 20)) {
ns->geom.pgaddrbytes = 4;
ns->geom.secaddrbytes = 2;
} else {
The page address size should be calculated according to chip size, but not total size of NAND flash. So we add a new chipsz in nandsim geometry to save the chip size, and use it to get page address size. Signed-off-by: Sheng Yong <shengyong1@huawei.com> --- drivers/mtd/nand/nandsim.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)