From patchwork Wed Apr 14 20:29:27 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 50201 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CDBD2B7D2F for ; Thu, 15 Apr 2010 07:33:00 +1000 (EST) Received: from localhost ([127.0.0.1]:32774 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O2ACf-0002Uo-SR for incoming@patchwork.ozlabs.org; Wed, 14 Apr 2010 17:32:58 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O29Xf-00052g-CK for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:36 -0400 Received: from [140.186.70.92] (port=35714 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O29XZ-0004uO-Pi for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O29XT-0001X7-4N for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:29 -0400 Received: from are.twiddle.net ([75.149.56.221]:41971) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O29XS-0001Wq-Nt for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:23 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 34E0AEC2; Wed, 14 Apr 2010 13:50:22 -0700 (PDT) Message-Id: <6deb2279dd92a9ff32e73e6f51a9e77c77b9de9a.1271277329.git.rth@twiddle.net> In-Reply-To: References: From: Richard Henderson Date: Wed, 14 Apr 2010 13:29:27 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 21/21] tcg-i386: Use lea for three-operand add. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The result is shorter than the mov+add that TCG would otherwise generate for us. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 23 ++++++++++++++++++++--- 1 files changed, 20 insertions(+), 3 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 4dec422..46e4574 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -1189,6 +1189,25 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_st_i32: tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]); break; + case INDEX_op_add_i32: + /* For 3-operand addition, use LEA. */ + if (args[0] != args[1]) { + TCGArg a0 = args[0], a1 = args[1], a2 = args[2], c3 = 0; + + if (const_args[2]) { + c3 = a2, a2 = -1; + } else if (a0 == a2) { + /* Watch out for dest = src + dest, since we've removed + the matching constraint on the add. */ + tgen_arithr(s, ARITH_ADD, a0, a1); + break; + } + + tcg_out_modrm_sib_offset(s, OPC_LEA, a0, a1, a2, 0, c3); + break; + } + c = ARITH_ADD; + goto gen_arith; case INDEX_op_sub_i32: c = ARITH_SUB; goto gen_arith; @@ -1201,8 +1220,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_xor_i32: c = ARITH_XOR; goto gen_arith; - case INDEX_op_add_i32: - c = ARITH_ADD; gen_arith: if (const_args[2]) { tgen_arithi(s, c, args[0], args[2], 0); @@ -1377,7 +1394,7 @@ static const TCGTargetOpDef x86_op_defs[] = { { INDEX_op_st16_i32, { "r", "r" } }, { INDEX_op_st_i32, { "r", "r" } }, - { INDEX_op_add_i32, { "r", "0", "ri" } }, + { INDEX_op_add_i32, { "r", "r", "ri" } }, { INDEX_op_sub_i32, { "r", "0", "ri" } }, { INDEX_op_mul_i32, { "r", "0", "ri" } }, { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },