@@ -108,6 +108,19 @@ struct lpc32xx_nand_slc_regs {
#define NAND_LARGE_BLOCK_PAGE_SIZE 2048
#define NAND_SMALL_BLOCK_PAGE_SIZE 512
+/* NAND ECC Layout for small page NAND devices
+ * Note: For large page devices, the default layouts are used. */
+static struct nand_ecclayout lpc32xx_nand_oob_16 = {
+ .eccbytes = 6,
+ .eccpos = {10, 11, 12, 13, 14, 15},
+ .oobfree = {
+ {.offset = 0,
+ . length = 4},
+ {.offset = 6,
+ . length = 4}
+ }
+};
+
#if defined(CONFIG_DMA_LPC32XX) && !defined(CONFIG_SPL_BUILD)
/* DMA Descriptors
* For Large Block: 17 descriptors = ((16 Data and ECC Read) + 1 Spare Area)
@@ -502,6 +515,9 @@ int board_nand_init(struct nand_chip *lpc32xx_chip)
#endif
lpc32xx_chip->ecc.strength = 1;
+ if (CONFIG_SYS_NAND_ECCSIZE != NAND_LARGE_BLOCK_PAGE_SIZE)
+ lpc32xx_chip->ecc.layout = &lpc32xx_nand_oob_16;
+
#if defined(CONFIG_SYS_NAND_USE_FLASH_BBT)
lpc32xx_chip->bbt_options |= NAND_BBT_USE_FLASH;
#endif