Message ID | 1438105083-19738-1-git-send-email-grmoore@opensource.altera.com |
---|---|
State | Superseded |
Headers | show |
On Tuesday, July 28, 2015 at 07:38:02 PM, Graham Moore wrote: A commit message would be really nice :-) > Signed-off-by: Graham Moore <grmoore@opensource.altera.com> > --- > V2: Add cdns prefix to driver-specific bindings. > V3: Use existing property "is-decoded-cs" instead of creating a duplicate, > "ext-decoder". Timing parameters are in nanoseconds, not master reference > clocks. Remove bus-num completely. > V4: Add new properties fifo-width and trigger-address > --- > .../devicetree/bindings/mtd/cadence_quadspi.txt | 54 > ++++++++++++++++++++ 1 file changed, 54 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/mtd/cadence_quadspi.txt > > diff --git a/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt > b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt new file mode > 100644 > index 0000000..d7e6fdd > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt > @@ -0,0 +1,54 @@ > +* Cadence Quad SPI controller > + > +Required properties: > +- compatible : Should be "cdns,qspi-nor". > +- reg : Contains two entries, each of which is a tuple consisting of a > + physical address and length. The first entry is the address and > + length of the controller register set. The second entry is the > + address and length of the QSPI Controller data area. > +- interrupts : Unit interrupt specifier for the controller interrupt. > +- clocks : phandle to the Quad SPI clock. > +- fifo-depth : Size of the data FIFO in words. This and the following two are absolutelly Cadence specific, so prefix them that way please: cdns,fifo-depth > +- fifo-width: Bus width of the data FIFO in bytes. cdns,fifo-width > +- trigger-address : 32-bit indirect AHB trigger address. cdns,trigger-address What is this address exactly? Is this documented somewhere what the value should be precisely ? [...]
diff --git a/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt new file mode 100644 index 0000000..d7e6fdd --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt @@ -0,0 +1,54 @@ +* Cadence Quad SPI controller + +Required properties: +- compatible : Should be "cdns,qspi-nor". +- reg : Contains two entries, each of which is a tuple consisting of a + physical address and length. The first entry is the address and + length of the controller register set. The second entry is the + address and length of the QSPI Controller data area. +- interrupts : Unit interrupt specifier for the controller interrupt. +- clocks : phandle to the Quad SPI clock. +- fifo-depth : Size of the data FIFO in words. +- fifo-width: Bus width of the data FIFO in bytes. +- trigger-address : 32-bit indirect AHB trigger address. + +Optional properties: +- is-decoded-cs : Flag to indicate whether decoder is used or not. + +Optional subnodes: +Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional +custom properties: +- cdns,page-size : Size, in bytes, of the device's write page +- cdns,block-size : Size of the device's erase block +- cdns,read-delay : Delay for read capture logic, in clock cycles +- cdns,tshsl-ns : Delay in nanoseconds for the length that the master mode chip select outputs are de-asserted between transactions. +- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being de-activated and the activation of another. +- cdns,tchsh-ns : Delay in nanoseconds between last bit of current transaction and deasserting the device chip select (qspi_n_ss_out). +- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low and first bit transfer. + +Example: + + qspi: spi@ff705000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xff705000 0x1000>, + <0xffa00000 0x1000>; + interrupts = <0 151 4>; + clocks = <&qspi_clk>; + is-decoded-cs = <1>; + fifo-depth = <128>; + fifo-width = <4>; + trigger-address = <0x00000000>; + + flash0: n25q00@0 { + ... + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + } + }
Signed-off-by: Graham Moore <grmoore@opensource.altera.com> --- V2: Add cdns prefix to driver-specific bindings. V3: Use existing property "is-decoded-cs" instead of creating a duplicate, "ext-decoder". Timing parameters are in nanoseconds, not master reference clocks. Remove bus-num completely. V4: Add new properties fifo-width and trigger-address --- .../devicetree/bindings/mtd/cadence_quadspi.txt | 54 ++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/cadence_quadspi.txt