| Message ID | a5ece7085956e97f35ecd5ddb41abd28a7c402a8.1437986785.git.cyrille.pitchen@atmel.com |
|---|---|
| State | Superseded |
| Headers | show |
Le 27/07/2015 10:59, Cyrille Pitchen a écrit : > This patch documents the DT bindings for the driver of the Atmel QSPI > controller embedded inside sama5d2x SoCs. > > Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Yes, it seems good: Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> > --- > .../devicetree/bindings/mtd/atmel-quadspi.txt | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/atmel-quadspi.txt > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt > new file mode 100644 > index 000000000000..0b8d545bb198 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt > @@ -0,0 +1,29 @@ > +* Atmel Quad Serial Peripheral Interface (QSPI) > + > +Required properties: > +- compatible: should be "atmel,sama5d2-qspi" > +- reg: the first contains the register location and length, > + the second contains the memory mapping address and length > +- interrupts: should contain the interrupt for the device > +- clocks: the phandle of the clock needed by the QSPI controller > +- #address-cells: should be <1> > +- #size-cells: should be <0> > + > +Example: > + > +spi@f0020000 { > + compatible = "atmel,sama5d2-qspi"; > + reg = <0xf0020000 0x100>, > + <0xd0000000 0x8000000>; > + interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; > + clocks = <&spi0_clk>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_spi0_default>; > + status = "okay"; > + > + m25p80@0 { > + ... > + }; > +}; >
diff --git a/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt new file mode 100644 index 000000000000..0b8d545bb198 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt @@ -0,0 +1,29 @@ +* Atmel Quad Serial Peripheral Interface (QSPI) + +Required properties: +- compatible: should be "atmel,sama5d2-qspi" +- reg: the first contains the register location and length, + the second contains the memory mapping address and length +- interrupts: should contain the interrupt for the device +- clocks: the phandle of the clock needed by the QSPI controller +- #address-cells: should be <1> +- #size-cells: should be <0> + +Example: + +spi@f0020000 { + compatible = "atmel,sama5d2-qspi"; + reg = <0xf0020000 0x100>, + <0xd0000000 0x8000000>; + interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&spi0_clk>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0_default>; + status = "okay"; + + m25p80@0 { + ... + }; +};
This patch documents the DT bindings for the driver of the Atmel QSPI controller embedded inside sama5d2x SoCs. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> --- .../devicetree/bindings/mtd/atmel-quadspi.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/atmel-quadspi.txt