From patchwork Sat Apr 10 01:32:49 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 49881 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 26CA4B7CF6 for ; Sat, 10 Apr 2010 11:47:46 +1000 (EST) Received: from localhost ([127.0.0.1]:46083 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O0PjM-0005fS-3P for incoming@patchwork.ozlabs.org; Fri, 09 Apr 2010 21:43:28 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O0PZg-0004bC-0i for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:28 -0400 Received: from [140.186.70.92] (port=49365 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O0PZZ-0004WT-EI for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O0PZW-0007Eu-Q5 for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:21 -0400 Received: from hall.aurel32.net ([88.191.82.174]:35034) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O0PZW-0007EP-Fa for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:18 -0400 Received: from [10.243.122.2] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1O0PZU-0005Md-Vo; Sat, 10 Apr 2010 03:33:17 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.71) (envelope-from ) id 1O0PZS-0004iN-WD; Sat, 10 Apr 2010 03:33:15 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sat, 10 Apr 2010 03:32:49 +0200 Message-Id: <1270863186-10180-2-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1270863186-10180-1-git-send-email-aurelien@aurel32.net> References: <1270863186-10180-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Andrzej Zaborowski , Aurelien Jarno Subject: [Qemu-devel] [PATCH v2 01/18] tcg/arm: remove SAVE_LR code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no need to save the LR register (r14) before a call to a subroutine. According to the "Procedure Call Standard for the ARM Architecture", it is the job of the callee to save this register. Moreover, this register is already saved in the prologue/epilogue. This patch removes the disabled SAVE_LR code, as there is no need to reenable later. Signed-off-by: Aurelien Jarno --- tcg/arm/tcg-target.c | 43 ------------------------------------------- 1 files changed, 0 insertions(+), 43 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index f0f669d..e86ed9a 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -748,10 +748,6 @@ static inline void tcg_out_call(TCGContext *s, int cond, uint32_t addr) { int32_t val; -#ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R8, 0, 14, SHIFT_IMM_LSL(0)); -#endif - val = addr - (tcg_target_long) s->code_ptr; if (val < 0x01fffffd && val > -0x01fffffd) tcg_out_bl(s, cond, val); @@ -770,23 +766,13 @@ static inline void tcg_out_call(TCGContext *s, int cond, uint32_t addr) } #endif } - -#ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 14, 0, TCG_REG_R8, SHIFT_IMM_LSL(0)); -#endif } static inline void tcg_out_callr(TCGContext *s, int cond, int arg) { -#ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R8, 0, 14, SHIFT_IMM_LSL(0)); -#endif /* TODO: on ARMv5 and ARMv6 replace with tcg_out_blx(s, cond, arg); */ tcg_out_dat_reg(s, cond, ARITH_MOV, 14, 0, 15, SHIFT_IMM_LSL(0)); tcg_out_bx(s, cond, arg); -#ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 14, 0, TCG_REG_R8, SHIFT_IMM_LSL(0)); -#endif } static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index) @@ -922,10 +908,6 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond, label_ptr = (void *) s->code_ptr; tcg_out_b(s, COND_EQ, 8); -# ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 8, 0, 14, SHIFT_IMM_LSL(0)); -# endif - /* TODO: move this code to where the constants pool will be */ if (addr_reg) tcg_out_dat_reg(s, cond, ARITH_MOV, @@ -972,10 +954,6 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond, break; } -# ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 14, 0, 8, SHIFT_IMM_LSL(0)); -# endif - *label_ptr += ((void *) s->code_ptr - (void *) label_ptr - 8) >> 2; #else /* !CONFIG_SOFTMMU */ if (GUEST_BASE) { @@ -1186,10 +1164,6 @@ static inline void tcg_out_qemu_st(TCGContext *s, int cond, } # endif -# ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 8, 0, 14, SHIFT_IMM_LSL(0)); -# endif - tcg_out_bl(s, cond, (tcg_target_long) qemu_st_helpers[s_bits] - (tcg_target_long) s->code_ptr); # if TARGET_LONG_BITS == 64 @@ -1197,10 +1171,6 @@ static inline void tcg_out_qemu_st(TCGContext *s, int cond, tcg_out_dat_imm(s, cond, ARITH_ADD, 13, 13, 0x10); # endif -# ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 14, 0, 8, SHIFT_IMM_LSL(0)); -# endif - *label_ptr += ((void *) s->code_ptr - (void *) label_ptr - 8) >> 2; #else /* !CONFIG_SOFTMMU */ if (GUEST_BASE) { @@ -1254,15 +1224,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, switch (opc) { case INDEX_op_exit_tb: -#ifdef SAVE_LR - if (args[0] >> 8) - tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, 15, 0); - else - tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R0, 0, args[0]); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, 15, 0, 14, SHIFT_IMM_LSL(0)); - if (args[0] >> 8) - tcg_out32(s, args[0]); -#else { uint8_t *ld_ptr = s->code_ptr; if (args[0] >> 8) @@ -1275,7 +1236,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out32(s, args[0]); } } -#endif break; case INDEX_op_goto_tb: if (s->tb_jmp_offset) { @@ -1627,9 +1587,6 @@ void tcg_target_init(TCGContext *s) (1 << TCG_REG_R12) | (1 << TCG_REG_R14)); tcg_regset_clear(s->reserved_regs); -#ifdef SAVE_LR - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R14); -#endif tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R8);