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[U-Boot,1/1] spi: tegra20: Add support for mode selection

Message ID 1437393396-10437-1-git-send-email-mirza.krak@hostmobility.com
State Superseded
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Mirza Krak July 20, 2015, 11:56 a.m. UTC 
From: Mirza Krak <mirza.krak@hostmobility.com>

Respect the mode passed in claim_bus call.

Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
---
 drivers/spi/tegra20_slink.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Mirza Krak Sept. 3, 2015, 7:40 p.m. UTC | #1 
ping

2015-07-20 13:56 GMT+02:00 Mirza Krak <mirza.krak@hostmobility.com>:

> From: Mirza Krak <mirza.krak@hostmobility.com>
>
> Respect the mode passed in claim_bus call.
>
> Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
> ---
>  drivers/spi/tegra20_slink.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
> index f6fb89b393f0..271e2adbb2e1 100644
> --- a/drivers/spi/tegra20_slink.c
> +++ b/drivers/spi/tegra20_slink.c
> @@ -36,6 +36,11 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define SLINK_CMD_ENB                  (1 << 31)
>  #define SLINK_CMD_GO                   (1 << 30)
>  #define SLINK_CMD_M_S                  (1 << 28)
> +#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW          (0 << 24)
> +#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH         (1 << 24)
> +#define SLINK_CMD_IDLE_SCLK_PULL_LOW           (2 << 24)
> +#define SLINK_CMD_IDLE_SCLK_PULL_HIGH          (3 << 24)
> +#define SLINK_CMD_IDLE_SCLK_MASK                       (3 << 24)
>  #define SLINK_CMD_CK_SDA               (1 << 21)
>  #define SLINK_CMD_CS_POL               (1 << 13)
>  #define SLINK_CMD_CS_VAL               (1 << 12)
> @@ -146,6 +151,7 @@ static int tegra30_spi_claim_bus(struct udevice *dev)
>         struct udevice *bus = dev->parent;
>         struct tegra30_spi_priv *priv = dev_get_priv(bus);
>         struct spi_regs *regs = priv->regs;
> +       unsigned int mode = priv->mode;
>         u32 reg;
>
>         /* Change SPI clock to correct frequency, PLLP_OUT0 source */
> @@ -161,6 +167,17 @@ static int tegra30_spi_claim_bus(struct udevice *dev)
>         /* Set master mode and sw controlled CS */
>         reg = readl(&regs->command);
>         reg |= SLINK_CMD_M_S | SLINK_CMD_CS_SOFT;
> +
> +       /* Set CPOL and CPHA */
> +       reg &= ~SLINK_CMD_IDLE_SCLK_MASK & ~SLINK_CMD_CK_SDA;
> +       if (mode & SPI_CPHA)
> +               reg |= SLINK_CMD_CK_SDA;
> +
> +       if (mode & SPI_CPOL)
> +               reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
> +       else
> +               reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
> +
>         writel(reg, &regs->command);
>         debug("%s: COMMAND = %08x\n", __func__, readl(&regs->command));
>
> --
> 2.1.0
>
>
Jagan Teki Sept. 4, 2015, 11:35 a.m. UTC | #2 
On 20 July 2015 at 17:26, Mirza Krak <mirza.krak@hostmobility.com> wrote:
> From: Mirza Krak <mirza.krak@hostmobility.com>
>
> Respect the mode passed in claim_bus call.
>
> Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
> ---
>  drivers/spi/tegra20_slink.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
> index f6fb89b393f0..271e2adbb2e1 100644
> --- a/drivers/spi/tegra20_slink.c
> +++ b/drivers/spi/tegra20_slink.c
> @@ -36,6 +36,11 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define SLINK_CMD_ENB                  (1 << 31)
>  #define SLINK_CMD_GO                   (1 << 30)
>  #define SLINK_CMD_M_S                  (1 << 28)
> +#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW          (0 << 24)
> +#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH         (1 << 24)
> +#define SLINK_CMD_IDLE_SCLK_PULL_LOW           (2 << 24)
> +#define SLINK_CMD_IDLE_SCLK_PULL_HIGH          (3 << 24)
> +#define SLINK_CMD_IDLE_SCLK_MASK                       (3 << 24)
>  #define SLINK_CMD_CK_SDA               (1 << 21)
>  #define SLINK_CMD_CS_POL               (1 << 13)
>  #define SLINK_CMD_CS_VAL               (1 << 12)
> @@ -146,6 +151,7 @@ static int tegra30_spi_claim_bus(struct udevice *dev)
>         struct udevice *bus = dev->parent;
>         struct tegra30_spi_priv *priv = dev_get_priv(bus);
>         struct spi_regs *regs = priv->regs;
> +       unsigned int mode = priv->mode;
>         u32 reg;
>
>         /* Change SPI clock to correct frequency, PLLP_OUT0 source */
> @@ -161,6 +167,17 @@ static int tegra30_spi_claim_bus(struct udevice *dev)
>         /* Set master mode and sw controlled CS */
>         reg = readl(&regs->command);
>         reg |= SLINK_CMD_M_S | SLINK_CMD_CS_SOFT;
> +
> +       /* Set CPOL and CPHA */
> +       reg &= ~SLINK_CMD_IDLE_SCLK_MASK & ~SLINK_CMD_CK_SDA;

I think we need to or CPOL and CPHA

what about this
             reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);

> +       if (mode & SPI_CPHA)
> +               reg |= SLINK_CMD_CK_SDA;
> +
> +       if (mode & SPI_CPOL)
> +               reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
> +       else
> +               reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
> +
>         writel(reg, &regs->command);
>         debug("%s: COMMAND = %08x\n", __func__, readl(&regs->command));
>
> --
> 2.1.0
>

thanks!
Mirza Krak Sept. 4, 2015, 11:47 a.m. UTC | #3 
2015-09-04 13:35 GMT+02:00 Jagan Teki <jteki@openedev.com>:
>
> I think we need to or CPOL and CPHA
>
> what about this
>              reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);
>

The end result should be the same as
     reg &= ~SLINK_CMD_IDLE_SCLK_MASK & ~SLINK_CMD_CK_SDA;

or am I wrong?

But I can agree that it is easier to read/follow your suggestion.
Jagan Teki Sept. 4, 2015, 12:29 p.m. UTC | #4 
On 4 September 2015 at 17:17, Mirza Krak <mirza.krak@hostmobility.com> wrote:
> 2015-09-04 13:35 GMT+02:00 Jagan Teki <jteki@openedev.com>:
>>
>> I think we need to or CPOL and CPHA
>>
>> what about this
>>              reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);
>>
>
> The end result should be the same as
>      reg &= ~SLINK_CMD_IDLE_SCLK_MASK & ~SLINK_CMD_CK_SDA;
>
> or am I wrong?

Yes, true.

>
> But I can agree that it is easier to read/follow your suggestion.

Please make this change and send.

thanks!
diff mbox

Patch

diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index f6fb89b393f0..271e2adbb2e1 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -36,6 +36,11 @@  DECLARE_GLOBAL_DATA_PTR;
 #define SLINK_CMD_ENB			(1 << 31)
 #define SLINK_CMD_GO			(1 << 30)
 #define SLINK_CMD_M_S			(1 << 28)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW		(0 << 24)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH		(1 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_LOW		(2 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_HIGH		(3 << 24)
+#define SLINK_CMD_IDLE_SCLK_MASK			(3 << 24)
 #define SLINK_CMD_CK_SDA		(1 << 21)
 #define SLINK_CMD_CS_POL		(1 << 13)
 #define SLINK_CMD_CS_VAL		(1 << 12)
@@ -146,6 +151,7 @@  static int tegra30_spi_claim_bus(struct udevice *dev)
 	struct udevice *bus = dev->parent;
 	struct tegra30_spi_priv *priv = dev_get_priv(bus);
 	struct spi_regs *regs = priv->regs;
+	unsigned int mode = priv->mode;
 	u32 reg;
 
 	/* Change SPI clock to correct frequency, PLLP_OUT0 source */
@@ -161,6 +167,17 @@  static int tegra30_spi_claim_bus(struct udevice *dev)
 	/* Set master mode and sw controlled CS */
 	reg = readl(&regs->command);
 	reg |= SLINK_CMD_M_S | SLINK_CMD_CS_SOFT;
+
+	/* Set CPOL and CPHA */
+	reg &= ~SLINK_CMD_IDLE_SCLK_MASK & ~SLINK_CMD_CK_SDA;
+	if (mode & SPI_CPHA)
+		reg |= SLINK_CMD_CK_SDA;
+
+	if (mode & SPI_CPOL)
+		reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
+	else
+		reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
+
 	writel(reg, &regs->command);
 	debug("%s: COMMAND = %08x\n", __func__, readl(&regs->command));