@@ -1019,7 +1019,6 @@ static inline bool access_secure_reg(CPUARMState *env)
((!arm_el_is_aa64((_env), 3) && arm_is_secure(_env))), \
(_val))
-void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
uint32_t cur_el, bool secure);
@@ -1592,7 +1591,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
#define cpu_gen_code cpu_arm_gen_code
#define cpu_signal_handler cpu_arm_signal_handler
-#define cpu_list arm_cpu_list
/* ARM has the following "translation regimes" (as the ARM ARM calls them):
*
@@ -4,6 +4,7 @@
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "sysemu/arch_init.h"
+#include "sysemu/cpus.h"
#include "sysemu/sysemu.h"
#include "qemu/bitops.h"
#include "qemu/crc32c.h"
@@ -3683,7 +3684,7 @@ static void arm_cpu_list_entry(gpointer data, gpointer user_data)
g_free(name);
}
-void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+static void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
CPUListState s = {
.file = f,
@@ -3704,6 +3705,8 @@ void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
#endif
}
+cpu_list_register(arm_cpu_list)
+
static void arm_cpu_add_definition(gpointer data, gpointer user_data)
{
ObjectClass *oc = data;
Register ARMs cpu_list() fn using the new cpu_list registration API. This prepares support for multi-arch where, #define cpu_list is not possible. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> --- target-arm/cpu.h | 2 -- target-arm/helper.c | 5 ++++- 2 files changed, 4 insertions(+), 3 deletions(-)