From patchwork Wed Apr 7 17:51:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 49630 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8CEAAB7CFA for ; Thu, 8 Apr 2010 04:33:17 +1000 (EST) Received: from localhost ([127.0.0.1]:38748 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NzZnE-0005mS-Jm for incoming@patchwork.ozlabs.org; Wed, 07 Apr 2010 14:16:00 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NzZQI-0006CI-L2 for qemu-devel@nongnu.org; Wed, 07 Apr 2010 13:52:18 -0400 Received: from [140.186.70.92] (port=55410 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NzZQ6-00065s-4G for qemu-devel@nongnu.org; Wed, 07 Apr 2010 13:52:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1NzZPi-0007KA-TQ for qemu-devel@nongnu.org; Wed, 07 Apr 2010 13:52:05 -0400 Received: from hall.aurel32.net ([88.191.82.174]:45323) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1NzZPi-0007J9-NA for qemu-devel@nongnu.org; Wed, 07 Apr 2010 13:51:42 -0400 Received: from [2a01:e35:2e80:2fb0:21e:8cff:feb0:693b] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1NzZPi-00011X-0N; Wed, 07 Apr 2010 19:51:42 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.71) (envelope-from ) id 1NzZPc-0001yA-Pc; Wed, 07 Apr 2010 19:51:36 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 7 Apr 2010 19:51:20 +0200 Message-Id: <1270662685-7379-14-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1270662685-7379-1-git-send-email-aurelien@aurel32.net> References: <1270662685-7379-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Andrzej Zaborowski , Aurelien Jarno Subject: [Qemu-devel] [PATCH 13/18] tcg/arm: use ext* ops in qemu_ld X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Aurelien Jarno --- tcg/arm/tcg-target.c | 30 ++++++++++++------------------ 1 files changed, 12 insertions(+), 18 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index d24a245..33ca2ca 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -475,6 +475,12 @@ static inline void tcg_out_ext8s(TCGContext *s, int cond, #endif } +static inline void tcg_out_ext8u(TCGContext *s, int cond, + int rd, int rn) +{ + tcg_out_dat_imm(s, cond, ARITH_AND, rd, rn, 0xff); +} + static inline void tcg_out_ext16s(TCGContext *s, int cond, int rd, int rn) { @@ -999,16 +1005,10 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) switch (opc) { case 0 | 4: - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R0, 0, TCG_REG_R0, SHIFT_IMM_LSL(24)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - data_reg, 0, TCG_REG_R0, SHIFT_IMM_ASR(24)); + tcg_out_ext8s(s, COND_AL, data_reg, TCG_REG_R0); break; case 1 | 4: - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R0, 0, TCG_REG_R0, SHIFT_IMM_LSL(16)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - data_reg, 0, TCG_REG_R0, SHIFT_IMM_ASR(16)); + tcg_out_ext16s(s, COND_AL, data_reg, TCG_REG_R0); break; case 0: case 1: @@ -1173,14 +1173,11 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) # if TARGET_LONG_BITS == 32 switch (opc) { case 0: - tcg_out_dat_imm(s, COND_AL, ARITH_AND, TCG_REG_R1, data_reg, 0xff); + tcg_out_ext8u(s, COND_AL, TCG_REG_R1, data_reg); tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index); break; case 1: - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R1, 0, data_reg, SHIFT_IMM_LSL(16)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R1, 0, TCG_REG_R1, SHIFT_IMM_LSR(16)); + tcg_out_ext16u(s, COND_AL, TCG_REG_R1, data_reg); tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index); break; case 2: @@ -1209,14 +1206,11 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) } switch (opc) { case 0: - tcg_out_dat_imm(s, COND_AL, ARITH_AND, TCG_REG_R2, data_reg, 0xff); + tcg_out_ext8u(s, COND_AL, TCG_REG_R2, data_reg); tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R3, 0, mem_index); break; case 1: - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R2, 0, data_reg, SHIFT_IMM_LSL(16)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - TCG_REG_R2, 0, TCG_REG_R2, SHIFT_IMM_LSR(16)); + tcg_out_ext16u(s, COND_AL, TCG_REG_R2, data_reg); tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R3, 0, mem_index); break; case 2: