| Message ID | 1270662685-7379-7-git-send-email-aurelien@aurel32.net |
|---|---|
| State | New |
| Headers | show |
> Use a set of #define to define the allowed ARM instructions, depending > on the __ARM_ARCH_*__ GCC defines. > > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > --- > tcg/arm/tcg-target.c | 27 ++++++++++++++++++++++++--- > 1 files changed, 24 insertions(+), 3 deletions(-) > > diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c > index ee5f723..cae6385 100644 > --- a/tcg/arm/tcg-target.c > +++ b/tcg/arm/tcg-target.c > @@ -22,6 +22,27 @@ > * THE SOFTWARE. > */ > > +#if defined(__ARM_ARCH_5T__) || \ > + defined(__ARM_ARCH_5TE__) || \ > + defined(__ARM_ARCH_5TEJ__) || \ > + defined(__ARM_ARCH_6__) || \ > + defined(__ARM_ARCH_7A__) || \ > + defined(__ARM_ARCH_7__) > +# define USE_ARMV5_INSTRUCTIONS 1 > +#endif Would be better to avoid redundancy by reordering a bit and doing: #if defined(__ARM_ARCH_5T__) || \ defined(__ARM_ARCH_5TE__) || \ defined(__ARM_ARCH_5TEJ__) || \ defined(USE_ARMV6_INSTRUCTIONS) > +#if defined(__ARM_ARCH_6__) || \ > + defined(__ARM_ARCH_7A__) || \ > + defined(__ARM_ARCH_7__) > +# define USE_ARMV6_INSTRUCTIONS 1 > +#endif Likewise. > +#if defined(__ARM_ARCH_7A__) || \ > + defined(__ARM_ARCH_7__) > +# define USE_ARMV7_INSTRUCTIONS 1 > +#endif Missing check for __ARM_ARCH_7R__. Should probably also check 7M and 7EM, even though we don't currently generate Thumb code. Paul
On 04/07/2010 10:51 AM, Aurelien Jarno wrote: > +#if defined(__ARM_ARCH_5T__) || \ > + defined(__ARM_ARCH_5TE__) || \ > + defined(__ARM_ARCH_5TEJ__) || \ > + defined(__ARM_ARCH_6__) || \ > + defined(__ARM_ARCH_7A__) || \ > + defined(__ARM_ARCH_7__) > +# define USE_ARMV5_INSTRUCTIONS 1 > +#endif Wouldn't it be better to add a zero definition here so that you can use C if's and not ifdefs, so as to make sure that all code paths are semantically correct. It's very easy to introduce a typo in a code path that isn't used by a particular host's build. r~
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index ee5f723..cae6385 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -22,6 +22,27 @@ * THE SOFTWARE. */ +#if defined(__ARM_ARCH_5T__) || \ + defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_5TEJ__) || \ + defined(__ARM_ARCH_6__) || \ + defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7__) +# define USE_ARMV5_INSTRUCTIONS 1 +#endif + +#if defined(__ARM_ARCH_6__) || \ + defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7__) +# define USE_ARMV6_INSTRUCTIONS 1 +#endif + +#if defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7__) +# define USE_ARMV7_INSTRUCTIONS 1 +#endif + + #ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r0", @@ -361,7 +382,7 @@ static inline void tcg_out_movi32(TCGContext *s, tcg_out_dat_imm(s, cond, ARITH_ADD, rd, 15, offset) : tcg_out_dat_imm(s, cond, ARITH_SUB, rd, 15, -offset); -#ifdef __ARM_ARCH_7A__ +#ifdef USE_ARMV7_INSTRUCTIONS /* use movw/movt */ /* movw */ tcg_out32(s, (cond << 28) | 0x03000000 | (rd << 12) @@ -1433,7 +1454,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_ext8s_i32: -#ifdef __ARM_ARCH_7A__ +#ifdef USE_ARMV7_INSTRUCTIONS /* sxtb */ tcg_out32(s, 0xe6af0070 | (args[0] << 12) | args[1]); #else @@ -1444,7 +1465,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, #endif break; case INDEX_op_ext16s_i32: -#ifdef __ARM_ARCH_7A__ +#ifdef USE_ARMV7_INSTRUCTIONS /* sxth */ tcg_out32(s, 0xe6bf0070 | (args[0] << 12) | args[1]); #else
Use a set of #define to define the allowed ARM instructions, depending on the __ARM_ARCH_*__ GCC defines. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> --- tcg/arm/tcg-target.c | 27 ++++++++++++++++++++++++--- 1 files changed, 24 insertions(+), 3 deletions(-)