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[RFC,9/9] tcg: update README about size changing ops

Message ID 1436958199-5181-10-git-send-email-aurelien@aurel32.net
State New
Headers show

Commit Message

Aurelien Jarno July 15, 2015, 11:03 a.m. UTC
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/README | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Richard Henderson July 17, 2015, 6:42 a.m. UTC | #1
On 07/15/2015 12:03 PM, Aurelien Jarno wrote:
> +These ops are all optional in that case they are implemented as mov.
> +This is to allow some optimizations if the target maintains registers
> +zero or sign extended. For example a MIPS64 CPU requires that all
> +32-bit values are stored sign-extended in the registers. This means
> +the trunc_shr_i64_i32 should sign-extend the value when moving it
> +from a 64-bit to a 32-bit register. It also means ext_i32_i64 can be
> +implemented as a simple mov as the value is already sign extended.

We need better wording.  Each one of the three are optional, and the other two 
must be implemented.  I think we ought to have a check in tcg.c about this, in 
tcg_add_target_add_op_defs.


r~
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Patch

diff --git a/tcg/README b/tcg/README
index 61b3899..d8fd17a 100644
--- a/tcg/README
+++ b/tcg/README
@@ -470,8 +470,19 @@  Floating point operations are not supported in this version. A
 previous incarnation of the code generator had full support of them,
 but it is better to concentrate on integer operations first.
 
-On a 64 bit target, no assumption is made in TCG about the storage of
-the 32 bit values in 64 bit registers.
+On a 64 bit target, the values are transfered between 32 and 64-bit
+registers by the mean of the following ops:
+- trunc_shr_i64_i32
+- ext_i32_i64
+- extu_i32_i64
+
+These ops are all optional in that case they are implemented as mov.
+This is to allow some optimizations if the target maintains registers
+zero or sign extended. For example a MIPS64 CPU requires that all
+32-bit values are stored sign-extended in the registers. This means
+the trunc_shr_i64_i32 should sign-extend the value when moving it
+from a 64-bit to a 32-bit register. It also means ext_i32_i64 can be
+implemented as a simple mov as the value is already sign extended.
 
 4.2) Constraints