| Message ID | 1436318605-13031-2-git-send-email-sam.mj@au1.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> writes: > On powernv secondary cpus are returned to OPAL, and will then enter the > target kernel in big-endian. However if it is set the HILE bit will persist, > causing the first exception in the target kernel to be delivered in > litte-endian regardless of the kernel endianess. > Make sure that the HILE bit is switched off before entering > kexec_sequence. > > Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> Discussed with Sam on IRC, this makes kexec environment the same (or at least closer to) booting the initial payload, which is a Good Thing(TM). The ignoring of any error from opal_reinit_cpus() (as done in this patch) is probably a good idea as we're either running on old firmware which doesn't have the call (in which case we'd explode no matter what) or we're on some crazy theoretical chip that doesn't do HILE=0, in which case this gives us the best chance for compatibility. Reviewed-by: Stewart Smith <stewart@linux.vnet.ibm.com>
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index 1a74446..2266135c 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c @@ -22,8 +22,10 @@ #include <asm/page.h> #include <asm/current.h> #include <asm/machdep.h> +#include <asm/opal.h> #include <asm/cacheflush.h> #include <asm/paca.h> +#include <asm/firmware.h> #include <asm/mmu.h> #include <asm/sections.h> /* _end */ #include <asm/prom.h> @@ -356,6 +358,10 @@ void default_machine_kexec(struct kimage *image) * switched to a static version! */ + /* Reset HILE in case we kexec into an older BE kernel */ + if (firmware_has_feature(FW_FEATURE_OPALv3)) + opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); + /* Some things are best done in assembly. Finding globals with * a toc is easier in C, so pass in what we can. */
On powernv secondary cpus are returned to OPAL, and will then enter the target kernel in big-endian. However if it is set the HILE bit will persist, causing the first exception in the target kernel to be delivered in litte-endian regardless of the kernel endianess. Make sure that the HILE bit is switched off before entering kexec_sequence. Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> --- arch/powerpc/kernel/machine_kexec_64.c | 6 ++++++ 1 file changed, 6 insertions(+)