@@ -1,3 +1,5 @@
+#include <dt-bindings/clock/sandbox-clk.h>
+
/dts-v1/;
/ {
@@ -105,7 +107,7 @@
compatible = "denx,u-boot-fdt-test";
};
- clk@0 {
+ clk: clk@0 {
compatible = "sandbox,clk";
};
@@ -149,6 +151,7 @@
reg = <0>;
compatible = "sandbox,i2c";
clock-frequency = <100000>;
+ clocks = <&clk SANDBOX_CLK_I2C>;
eeprom@2c {
reg = <0x2c>;
compatible = "i2c-eeprom";
@@ -183,6 +186,7 @@
pci: pci-controller {
compatible = "sandbox,pci";
device_type = "pci";
+ clocks = <&clk SANDBOX_CLK_PCI>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
@@ -196,10 +200,15 @@
};
};
+ pinctrl@0 {
+ compatible = "sandbox,pinctrl";
+ };
+
spi@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
+ clocks = <&clk SANDBOX_CLK_SPI>;
compatible = "sandbox,spi";
cs-gpios = <0>, <&gpio_a 0>;
spi.bin@0 {
@@ -44,3 +44,4 @@ CONFIG_UT_DM=y
CONFIG_UT_ENV=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_CLK=y
+CONFIG_PINCTRL=y
@@ -7,3 +7,4 @@
obj-$(CONFIG_PINCTRL) += pinctrl-uclass.o
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_SANDBOX) += pinctrl_sandbox.o
new file mode 100644
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pinctrl.h>
+#include <asm/test.h>
+#include <dt-bindings/clock/sandbox-clk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+ debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+
+ /* We require particular flag values, just as a sanity check */
+ switch (func) {
+ case PERIPH_ID_SPI:
+ if (flags != 1)
+ return -EINVAL;
+ break;
+ case PERIPH_ID_I2C:
+ if (flags != 0)
+ return -EINVAL;
+ break;
+ case PERIPH_ID_PCI:
+ if (flags != 7)
+ return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int sandbox_pinctrl_get_periph_id(struct udevice *dev,
+ struct udevice *periph)
+{
+ u32 cell[2];
+ int ret;
+
+ ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset,
+ "clocks", cell, ARRAY_SIZE(cell));
+ if (ret < 0)
+ return -EINVAL;
+
+ switch (cell[1]) {
+ case SANDBOX_CLK_SPI:
+ return PERIPH_ID_SPI;
+ case SANDBOX_CLK_I2C:
+ return PERIPH_ID_I2C;
+ case SANDBOX_CLK_PCI:
+ return PERIPH_ID_PCI;
+ }
+
+ return -ENOENT;
+}
+
+static struct pinctrl_ops sandbox_pinctrl_ops = {
+ .request = sandbox_pinctrl_request,
+ .get_periph_id = sandbox_pinctrl_get_periph_id,
+};
+
+static const struct udevice_id sandbox_pinctrl_ids[] = {
+ { .compatible = "sandbox,pinctrl" },
+ { }
+};
+
+U_BOOT_DRIVER(pinctrl_sandbox) = {
+ .name = "pinctrl_sandbox",
+ .id = UCLASS_PINCTRL,
+ .of_match = sandbox_pinctrl_ids,
+ .ops = &sandbox_pinctrl_ops,
+};
new file mode 100644
@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Author: Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#define SANDBOX_CLK_SPI 42
+#define SANDBOX_CLK_PCI 43
+#define SANDBOX_CLK_I2C 44
@@ -20,6 +20,7 @@ obj-$(CONFIG_DM_ETH) += eth.o
obj-$(CONFIG_DM_GPIO) += gpio.o
obj-$(CONFIG_DM_I2C) += i2c.o
obj-$(CONFIG_DM_PCI) += pci.o
+obj-$(CONFIG_PINCTRL) += pinctrl.o
obj-$(CONFIG_DM_RTC) += rtc.o
obj-$(CONFIG_DM_SPI_FLASH) += sf.o
obj-$(CONFIG_DM_SPI) += spi.o
new file mode 100644
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pinctrl.h>
+#include <asm/io.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <linux/err.h>
+#include <test/ut.h>
+
+/* Test that we can obtain peripheral IDs */
+static int dm_test_pinctrl_periph(struct unit_test_state *uts)
+{
+ struct udevice *pinctrl, *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl));
+ ut_assertok(uclass_get_device_by_seq(UCLASS_SPI, 0, &dev));
+ ut_asserteq(PERIPH_ID_SPI, pinctrl_get_periph_id(pinctrl, dev));
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, 0, &dev));
+ ut_asserteq(PERIPH_ID_I2C, pinctrl_get_periph_id(pinctrl, dev));
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &dev));
+ ut_asserteq(PERIPH_ID_PCI, pinctrl_get_periph_id(pinctrl, dev));
+
+ return 0;
+}
+DM_TEST(dm_test_pinctrl_periph, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that we can adjust pinctrl settings */
+static int dm_test_pinctrl_request(struct unit_test_state *uts)
+{
+ struct udevice *pinctrl, *dev;
+ int id;
+
+ ut_assertok(uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl));
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_SPI, 0, &dev));
+ id = pinctrl_get_periph_id(pinctrl, dev);
+ ut_asserteq(-EINVAL, pinctrl_request(pinctrl, id, 0));
+ ut_asserteq(-EINVAL, pinctrl_request_noflags(pinctrl, id));
+ ut_assertok(pinctrl_request(pinctrl, id, 1));
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, 0, &dev));
+ id = pinctrl_get_periph_id(pinctrl, dev);
+ ut_asserteq(-EINVAL, pinctrl_request(pinctrl, id, 2));
+ ut_assertok(pinctrl_request_noflags(pinctrl, id));
+ ut_assertok(pinctrl_request(pinctrl, id, 0));
+
+ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &dev));
+ id = pinctrl_get_periph_id(pinctrl, dev);
+ ut_asserteq(-EINVAL, pinctrl_request(pinctrl, id, 0));
+ ut_asserteq(-EINVAL, pinctrl_request_noflags(pinctrl, id));
+ ut_assertok(pinctrl_request(pinctrl, id, 7));
+
+ return 0;
+}
+DM_TEST(dm_test_pinctrl_request, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Add tests of each API call using a sandbox pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/sandbox/dts/test.dts | 11 ++++- configs/sandbox_defconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl_sandbox.c | 80 +++++++++++++++++++++++++++++++++ include/dt-bindings/clock/sandbox-clk.h | 10 +++++ test/dm/Makefile | 1 + test/dm/pinctrl.c | 63 ++++++++++++++++++++++++++ 7 files changed, 166 insertions(+), 1 deletion(-) create mode 100644 drivers/pinctrl/pinctrl_sandbox.c create mode 100644 include/dt-bindings/clock/sandbox-clk.h create mode 100644 test/dm/pinctrl.c