@@ -57,6 +57,7 @@ static void cache_flush(void)
#ifndef CONFIG_SYS_CACHELINE_SIZE
#define CONFIG_SYS_CACHELINE_SIZE 32
#endif
+#define CACHLINE_MASK (CONFIG_SYS_CACHELINE_SIZE - 1)
void invalidate_dcache_all(void)
{
@@ -88,6 +89,9 @@ static int check_cache_range(unsigned long start, unsigned long stop)
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
+ stop = (stop + CACHLINE_MASK) & ~CACHLINE_MASK;
+ start &= ~CACHLINE_MASK;
+
if (!check_cache_range(start, stop))
return;
@@ -99,6 +103,9 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop)
void flush_dcache_range(unsigned long start, unsigned long stop)
{
+ stop = (stop + CACHLINE_MASK) & ~CACHLINE_MASK;
+ start &= ~CACHLINE_MASK;
+
if (!check_cache_range(start, stop))
return;
cache flushing addresses must be cacheline size aligned, so mask the start and stop address appropriately. Signed-off-by: Alexander Stein <alexanders83@web.de> --- arch/arm/cpu/arm1176/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+)