diff mbox

[U-Boot,v3,4/8] x86: Add ROM image description for minnowmax

Message ID 1435969709-32547-5-git-send-email-sjg@chromium.org
State Accepted
Delegated to: Simon Glass
Headers show

Commit Message

Simon Glass July 4, 2015, 12:28 a.m. UTC 
The layout of the ROM is a bit hard to discover by reading the code. Add
a table to make it easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v3: None
Changes in v2:
- Fix typos in README.x86

 doc/README.x86 | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Simon Glass July 7, 2015, 10:54 p.m. UTC | #1 
On 3 July 2015 at 18:28, Simon Glass <sjg@chromium.org> wrote:
> The layout of the ROM is a bit hard to discover by reading the code. Add
> a table to make it easier.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Fix typos in README.x86
>
>  doc/README.x86 | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)

Applied to u-boot-x86.
diff mbox

Patch

diff --git a/doc/README.x86 b/doc/README.x86
index 49d6e83..e58ca19 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -160,6 +160,23 @@  Now you can build U-Boot and obtain u-boot.rom
 $ make minnowmax_defconfig
 $ make all
 
+The ROM image is broken up into these parts:
+
+Offset   Description         Controlling config
+------------------------------------------------------------
+000000   descriptor.bin      Hard-coded to 0 in ifdtool
+001000   me.bin              Set by the descriptor
+500000   <spare>
+700000   u-boot-dtb.bin      CONFIG_SYS_TEXT_BASE
+790000   vga.bin             CONFIG_X86_OPTION_ROM_ADDR
+7c0000   fsp.bin             CONFIG_FSP_ADDR
+7f8000   <spare>             (depends on size of fsp.bin)
+7fe000   Environment         CONFIG_ENV_OFFSET
+7ff800   U-Boot 16-bit boot  CONFIG_SYS_X86_START16
+
+Overall ROM image size is controlled by CONFIG_ROM_SIZE.
+
+
 Intel Galileo instructions:
 
 Only one binary blob is needed for Remote Management Unit (RMU) within Intel