@@ -25,6 +25,12 @@ Optional properties:
-maxim,enable-frequency-shift: boolean, enable 9% frequency shift.
-maxim,enable-bias-control: boolean, enable bias control. By enabling this
startup delay can be reduce to 20us from 220us.
+-maxim,enable-etr: boolean, enable Enhanced Transient Response.
+-maxim,enable-high-etr-sensitivity: boolean, Enhanced transient response
+ circuit is enabled and set for high sensitivity. If this
+ property is available then etr will be enable default.
+
+Enhanced transient response (ETR) will affect the configuration of CKADV.
Example:
@@ -421,6 +421,8 @@ static struct max8973_regulator_platform_data *max8973_parse_dt(
struct device_node *np = dev->of_node;
int ret;
u32 pval;
+ bool etr_enable;
+ bool etr_sensitivity_high;
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
@@ -452,6 +454,23 @@ static struct max8973_regulator_platform_data *max8973_parse_dt(
if (of_property_read_bool(np, "maxim,enable-bias-control"))
pdata->control_flags |= MAX8973_CONTROL_BIAS_ENABLE;
+ etr_enable = of_property_read_bool(np, "maxim,enable-etr");
+ etr_sensitivity_high = of_property_read_bool(np,
+ "maxim,enable-high-etr-sensitivity");
+ if (etr_sensitivity_high)
+ etr_enable = true;
+
+ if (etr_enable) {
+ if (etr_sensitivity_high)
+ pdata->control_flags |=
+ MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US;
+ else
+ pdata->control_flags |=
+ MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US;
+ } else {
+ pdata->control_flags |= MAX8973_CONTROL_CLKADV_TRIP_DISABLED;
+ }
+
return pdata;
}
The MAX8973/MAX77621 feature an Enhanced Transient Response(ETR) circuit that is enabled through software. The enhanced transient response reduces the voltage droop during large load steps by temporarily allowing all three phases to fire in unison, slewing total inductor current faster than would normally be possible if all three phases continued to operate 120deg out of phase. The enhanced transient response detector features two selectable sensitivity settings, which select the output voltage slew rate during load transients that triggers the ETR circuit. The sensitivity of the ETR detector is set by the CKADV[1:0] bits in the CONTROL2 register. Add support to configure the ETR through platform data from DT. Update the DT binding document accordingly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> --- .../bindings/regulator/max8973-regulator.txt | 6 ++++++ drivers/regulator/max8973-regulator.c | 19 +++++++++++++++++++ 2 files changed, 25 insertions(+)