Message ID | 1435631776-9733-4-git-send-email-Peng.Fan@freescale.com |
---|---|
State | Superseded |
Delegated to: | Stefano Babic |
Headers | show |
On 30/06/2015 04:36, Peng Fan wrote: > The i.MX6DQP has a PRG module, need to enable its clock for using IPU. > > Signed-off-by: Peng Fan <Peng.Fan@freescale.com> > Signed-off-by: Brown Oliver <B37094@freescale.com> > Signed-off-by: Ye.Li <B37916@freescale.com> > Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > > Changes v4: > Take Fabio's suggestion, use setbits_le32. Add Fabio's Reviewed-by > Changes v3: > Remove ipu qos settings > > Changes v2: > 1. runtime check > 2. introduce ipu qos settings for better performance > > arch/arm/cpu/armv7/mx6/clock.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c > index 446fe84..b7e714c 100644 > --- a/arch/arm/cpu/armv7/mx6/clock.c > +++ b/arch/arm/cpu/armv7/mx6/clock.c > @@ -866,6 +866,11 @@ void enable_ipu_clock(void) > reg = readl(&mxc_ccm->CCGR3); > reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK; > writel(reg, &mxc_ccm->CCGR3); > + > + if (is_mx6dqp()) { > + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK); > + setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK); > + } > } > #endif > /***************************************************/ > Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 446fe84..b7e714c 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -866,6 +866,11 @@ void enable_ipu_clock(void) reg = readl(&mxc_ccm->CCGR3); reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK; writel(reg, &mxc_ccm->CCGR3); + + if (is_mx6dqp()) { + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK); + setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK); + } } #endif /***************************************************/