diff mbox

PowerPC/FSL/CPM1: Configure clock correctly for SCC

Message ID 201003291436.o2TEaJd2026111@goedel.recco.de (mailing list archive)
State Superseded
Delegated to: Kumar Gala
Headers show

Commit Message

Wolfgang Ocker March 29, 2010, 1:22 p.m. UTC 
The board setup functions call cpm1_clk_setup() to configure the clock
source.

If CPM_CLK_RTX has been used for the parameter mode,
the clock has been configured only for TX but not for RX.

Now CPM_CLK_RTX configures the clock for both directions correctly.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
---
 arch/powerpc/sysdev/cpm1.c |   14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index a4b41db..786e178 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -485,9 +485,6 @@  int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
 		return -EINVAL;
 	}
 
-	if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX)
-		shift += 3;
-
 	for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
 		if (clk_map[i][0] == target && clk_map[i][1] == clock) {
 			bits = clk_map[i][2];
@@ -502,6 +499,17 @@  int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
 
 	bits <<= shift;
 	mask <<= shift;
+
+	if (reg == &mpc8xx_immr->im_cpm.cp_sicr) {
+		if (mode == CPM_CLK_RTX) {
+			bits |= bits << 3;
+			mask |= mask << 3;
+		} else if (mode == CPM_CLK_RX) {
+			bits <<= 3;
+			mask <<= 3;
+		}
+	}
+
 	out_be32(reg, (in_be32(reg) & ~mask) | bits);
 
 	return 0;