From patchwork Wed Mar 24 21:56:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Ilyevsky X-Patchwork-Id: 48474 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 14421B7C48 for ; Thu, 25 Mar 2010 08:57:57 +1100 (EST) Received: from localhost ([127.0.0.1]:47012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NuYaI-0007Nv-QQ for incoming@patchwork.ozlabs.org; Wed, 24 Mar 2010 17:57:54 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NuYZk-0007Np-6X for qemu-devel@nongnu.org; Wed, 24 Mar 2010 17:57:20 -0400 Received: from [140.186.70.92] (port=43855 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NuYZi-0007Nh-GV for qemu-devel@nongnu.org; Wed, 24 Mar 2010 17:57:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1NuYZg-0002J3-JQ for qemu-devel@nongnu.org; Wed, 24 Mar 2010 17:57:18 -0400 Received: from mail-ww0-f45.google.com ([74.125.82.45]:34653) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1NuYZg-0002Id-8A for qemu-devel@nongnu.org; Wed, 24 Mar 2010 17:57:16 -0400 Received: by wwb28 with SMTP id 28so415531wwb.4 for ; Wed, 24 Mar 2010 14:57:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type; bh=Lz9eVxYXfqUT92shAb3s8p1T8dxPmSu0U/t89OFS7lE=; b=tVxzwilKTBg845DW2IdhZH8bQ/q52j5sRwxAp6qAnRYtFqg1JHIU2BSJqYxY5Iquy8 G1AgnSuOwI3tUogkKXm23Dv4Wpr/wj6dAmRWAQA5vnfMwgTVDvXYWTrflsU9hG1EJprK knQdJKcY42M8mQMoo4iI/vroQdjvwxa+TKxeg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=UBeyJ3GTGEbg4zaQmPZTor7LS0BBSC6xzO8Q4IRsvkBML2RbZYhfH/0W/nl+s74Oog JPXx2ASpH+2gNIME79ITzkIqc48BAOnSsJYWSAgaZU1pTSyxX7qmKMXIV1Zh3j+0E5SG HmJRxXctaYrZTxsmhz2BAfidsFXUAWVbqRJQw= MIME-Version: 1.0 Received: by 10.216.87.66 with SMTP id x44mr1335496wee.96.1269467834423; Wed, 24 Mar 2010 14:57:14 -0700 (PDT) In-Reply-To: <8F6B1156-5574-41A3-B2EE-978E77391EF7@suse.de> References: <4aa8564b0912011033n68653e6dufc4bd87ccaf030a5@mail.gmail.com> <8F6B1156-5574-41A3-B2EE-978E77391EF7@suse.de> From: Dmitry Ilyevsky Date: Thu, 25 Mar 2010 00:56:54 +0300 Message-ID: <4aa8564b1003241456y4851b964iafcc534324506666@mail.gmail.com> Subject: Re: [Qemu-devel] TBL register permissions for PPC To: Alexander Graf , "Krumme, Chris" X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: qemu-devel@nongnu.org X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hello All, Please review patch for TBL SPR read access for generic PPC. *Description:* POWER specification docs define TBL/TBU SPRs as readable in user and privileged modes. Therefore SPRs permissions were changed in gen_tbl function in target-ppc/translate_init.c file. *Testing:* Tested with vxworks-6.2 bsp and OS on custom qemu board that includes ppc405 emulated core BR, Dmitry Ilyevsky On Wed, Dec 2, 2009 at 2:23 AM, Alexander Graf wrote: > > On 01.12.2009, at 19:33, Dima Ilyevsky wrote: > > > Hello All, > > > > I have a question about read permissions of TBL SPR for all ppc > processors: > > I have discovered that my application, compiled by WindRiver diab > compiler and running in vxworks OS on ppc405 architecture bumps into > exception generated when trying to read TBL or TBU registers: > > Unless Linux does something funky, mftlb, mftbu (and mftb on 64 bit) are > readable from PR=1. > > int main() > { > long tbu=0, tbl=0; > > asm("mftbu %0" : "=r" (tbu)); > asm("mftbl %0" : "=r" (tbl)); > > printf("TB: %#x %#x\n", tbl, tbu); > } > > agraf@lychee:/tmp> ./mftb > TB: 0xc0397180 0x603 > > However it can't be written to: > > asm("mttbl %0" : : "r" (tbl)); > > agraf@lychee:/tmp> ./mftb > Illegal instruction > > > So yes, I'd suspect a bug in qemu here. Feel free to send a patch. > > Alex > From 141bf29f5355f163205c57e98590730ed15bfb86 Mon Sep 17 00:00:00 2001 From: n/a Date: Thu, 25 Mar 2010 00:22:25 +0300 Subject: [PATCH] Generic PowerPC time base SPR should be accessible in user/priv modes for reading --- target-ppc/translate_init.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index db4dc17..e8eadf4 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -777,16 +777,16 @@ static void gen_tbl (CPUPPCState *env) &spr_read_tbl, SPR_NOACCESS, 0x00000000); spr_register(env, SPR_TBL, "TBL", - SPR_NOACCESS, SPR_NOACCESS, - SPR_NOACCESS, &spr_write_tbl, + &spr_read_tbl, SPR_NOACCESS, + &spr_read_tbl, &spr_write_tbl, 0x00000000); spr_register(env, SPR_VTBU, "TBU", &spr_read_tbu, SPR_NOACCESS, &spr_read_tbu, SPR_NOACCESS, 0x00000000); spr_register(env, SPR_TBU, "TBU", - SPR_NOACCESS, SPR_NOACCESS, - SPR_NOACCESS, &spr_write_tbu, + &spr_read_tbu, SPR_NOACCESS, + &spr_read_tbu, &spr_write_tbu, 0x00000000); } -- 1.7.0