Patchwork TBL register permissions for PPC

login
register
mail settings
Submitter Dmitry Ilyevsky
Date March 24, 2010, 9:56 p.m.
Message ID <4aa8564b1003241456y4851b964iafcc534324506666@mail.gmail.com>
Download mbox | patch
Permalink /patch/48474/
State New
Headers show

Comments

Dmitry Ilyevsky - March 24, 2010, 9:56 p.m.
Hello All,

Please review patch for TBL SPR read access for generic PPC.

*Description:*

POWER specification docs define TBL/TBU SPRs as readable in user
and privileged modes. Therefore SPRs permissions were changed in gen_tbl
function in target-ppc/translate_init.c file.

*Testing:*

Tested with vxworks-6.2 bsp and OS on custom qemu board that includes ppc405
emulated core


BR,
Dmitry Ilyevsky

On Wed, Dec 2, 2009 at 2:23 AM, Alexander Graf <agraf@suse.de> wrote:

>
> On 01.12.2009, at 19:33, Dima Ilyevsky wrote:
>
> > Hello All,
> >
> > I have a question about read permissions of TBL SPR for all ppc
> processors:
> > I have discovered that my application, compiled by WindRiver diab
> compiler and running in vxworks OS on ppc405 architecture bumps into
> exception generated when trying to read TBL or TBU registers:
>
> Unless Linux does something funky, mftlb, mftbu (and mftb on 64 bit) are
> readable from PR=1.
>
> int main()
> {
>    long tbu=0, tbl=0;
>
>    asm("mftbu %0" : "=r" (tbu));
>    asm("mftbl %0" : "=r" (tbl));
>
>    printf("TB: %#x %#x\n", tbl, tbu);
> }
>
> agraf@lychee:/tmp> ./mftb
> TB: 0xc0397180 0x603
>
> However it can't be written to:
>
> asm("mttbl %0" : : "r" (tbl));
>
> agraf@lychee:/tmp> ./mftb
> Illegal instruction
>
>
> So yes, I'd suspect a bug in qemu here. Feel free to send a patch.
>
> Alex
>
Alexander Graf - March 25, 2010, 7:53 a.m.
On 24.03.2010, at 22:56, Dmitry Ilyevsky wrote:

> 
> Hello All,
> 
> Please review patch for TBL SPR read access for generic PPC.
> 
> Description:
> 
> POWER specification docs define TBL/TBU SPRs as readable in user and privileged modes. Therefore SPRs permissions were changed in gen_tbl function in target-ppc/translate_init.c file.
> 
> Testing:
> 
> Tested with vxworks-6.2 bsp and OS on custom qemu board that includes ppc405 emulated core

A couple of comments to this patch.

1) Please don't top-post.
2) Always put a Signed-off-by: in the patch
3) Put the patch description into the patch, so git knows what to do with it
4) Don't use html features in mail :-)

The patch looks good otherwise.


Alex

Patch

From 141bf29f5355f163205c57e98590730ed15bfb86 Mon Sep 17 00:00:00 2001
From: n/a <install@ubuntu-desktop.(none)>
Date: Thu, 25 Mar 2010 00:22:25 +0300
Subject: [PATCH] Generic PowerPC time base SPR should be accessible in user/priv modes for reading

---
 target-ppc/translate_init.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index db4dc17..e8eadf4 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -777,16 +777,16 @@  static void gen_tbl (CPUPPCState *env)
                  &spr_read_tbl, SPR_NOACCESS,
                  0x00000000);
     spr_register(env, SPR_TBL,   "TBL",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, &spr_write_tbl,
+                 &spr_read_tbl, SPR_NOACCESS,
+                 &spr_read_tbl, &spr_write_tbl,
                  0x00000000);
     spr_register(env, SPR_VTBU,  "TBU",
                  &spr_read_tbu, SPR_NOACCESS,
                  &spr_read_tbu, SPR_NOACCESS,
                  0x00000000);
     spr_register(env, SPR_TBU,   "TBU",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, &spr_write_tbu,
+                 &spr_read_tbu, SPR_NOACCESS,
+                 &spr_read_tbu, &spr_write_tbu,
                  0x00000000);
 }
 
-- 
1.7.0