Message ID | 20150609180048.GA14132@ibm-tiger.the-meissners.org |
---|---|
State | New |
Headers | show |
On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote:
> +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3));
A colon went missing? ^^^
Segher
On Tue, Jun 09, 2015 at 02:17:19PM -0500, Segher Boessenkool wrote: > On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote: > > +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3)); > > A colon went missing? ^^^ Yes, I will correct it when I check it in. Thanks.
On Tue, Jun 9, 2015 at 3:26 PM, Michael Meissner <meissner@linux.vnet.ibm.com> wrote: > On Tue, Jun 09, 2015 at 02:17:19PM -0500, Segher Boessenkool wrote: >> On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote: >> > +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3)); >> >> A colon went missing? ^^^ > > Yes, I will correct it when I check it in. Thanks. Mike, VSX registers are a superset of Altivec registers, so the statement about an Altivec register used where a VSX register is expected is a little confusing. How about: Otherwise the register number output in the assembly file will be incorrect if an Altivec register is an operand of a VSX instruction that expects VSX register numbering. Thanks, David
On Tue, Jun 09, 2015 at 08:28:35PM -0400, David Edelsohn wrote: > On Tue, Jun 9, 2015 at 3:26 PM, Michael Meissner > <meissner@linux.vnet.ibm.com> wrote: > > On Tue, Jun 09, 2015 at 02:17:19PM -0500, Segher Boessenkool wrote: > >> On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote: > >> > +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3)); > >> > >> A colon went missing? ^^^ > > > > Yes, I will correct it when I check it in. Thanks. > > Mike, > > VSX registers are a superset of Altivec registers, so the statement > about an Altivec register used where a VSX register is expected is a > little confusing. How about: > > Otherwise the register number output in the assembly file will be > incorrect if an Altivec register is an operand of a VSX instruction > that expects VSX register numbering. The re-wording is fine with me. I will check in the patch. Thanks.
Index: gcc/doc/md.texi =================================================================== --- gcc/doc/md.texi (revision 224165) +++ gcc/doc/md.texi (working copy) @@ -3070,6 +3070,26 @@ Altivec vector register @item wa Any VSX register if the -mvsx option was used or NO_REGS. +When using any of the register constraints (@code{wa}, @code{wd}, +@code{wf}, @code{wg}, @code{wh}, @code{wi}, @code{wj}, @code{wk}, +@code{wl}, @code{wm}, @code{ws}, @code{wt}, @code{wu}, @code{wv}, +@code{ww}, or @code{wy}) that take VSX registers, you must use +@code{%x<n>} in the template so that the correct register is used. +Otherwise, the register number will be incorrect if an Altivec +register is used in a place where a VSX register is expected. + +@smallexample +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3)); +@end smallexample + +is correct, but: + +@smallexample +asm ("xvadddp %0,%1,%2" "=wa" (v1) : "wa" (v2), "wa" (v3)); +@end smallexample + +is not correct. + @item wd VSX vector register to hold vector double data or NO_REGS.