@@ -90,4 +90,11 @@
#define ICH9_SMI_EN_APMC_EN BIT5
#define ICH9_SMI_EN_GBL_SMI_EN BIT0
+//
+// Root Complex Base Address register
+//
+#define ICH9_RCBA 0xf0
+#define ICH9_ROOT_COMPLEX_BASE 0xfed1c000
+#define ICH9_RCBA_EN BIT0
+
#endif
@@ -261,6 +261,13 @@ MiscInitialization (
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
+
+ //
+ // Set Root Complex Register Block BAR
+ //
+ PciWrite32 (POWER_MGMT_REGISTER_Q35 (ICH9_RCBA),
+ ICH9_ROOT_COMPLEX_BASE | ICH9_RCBA_EN
+ );
break;
default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
This patch initialises root complex register block BAR in order to support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit not set) on QEMU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> --- OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 7 +++++++ OvmfPkg/PlatformPei/Platform.c | 7 +++++++ 2 files changed, 14 insertions(+)