diff mbox

[U-Boot,04/11] dm: spi: Correct BIOS protection logic for ICH9

Message ID 1433688642-19861-5-git-send-email-sjg@chromium.org
State Superseded
Delegated to: Simon Glass
Headers show

Commit Message

Simon Glass June 7, 2015, 2:50 p.m. UTC
The logic is incorrect and currently has no effect. Fix it so that we can
write to SPI flash, since by default it is write-protected.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/spi/ich.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Bin Meng June 8, 2015, 1:55 a.m. UTC | #1
On Sun, Jun 7, 2015 at 10:50 PM, Simon Glass <sjg@chromium.org> wrote:
> The logic is incorrect and currently has no effect. Fix it so that we can
> write to SPI flash, since by default it is write-protected.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  drivers/spi/ich.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
> index a8b4d0d..784320f 100644
> --- a/drivers/spi/ich.c
> +++ b/drivers/spi/ich.c
> @@ -687,10 +687,10 @@ static int ich_spi_probe(struct udevice *bus)
>                 struct ich9_spi_regs *ich9_spi;
>
>                 ich9_spi = priv->base;
> -               bios_cntl = ich_readb(priv, ich9_spi->bcr);
> +               bios_cntl = readb(&ich9_spi->bcr);
>                 bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
>                 bios_cntl |= 1;         /* Write Protect Disable (WPD) */
> -               ich_writeb(priv, bios_cntl, ich9_spi->bcr);
> +               writeb(bios_cntl, &ich9_spi->bcr);
>         } else {
>                 pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
>                 if (plat->ich_version == 9)
> --

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Jagan Teki June 8, 2015, 5:58 p.m. UTC | #2
Hi Simon,

On 7 June 2015 at 20:20, Simon Glass <sjg@chromium.org> wrote:
> The logic is incorrect and currently has no effect. Fix it so that we can
> write to SPI flash, since by default it is write-protected.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  drivers/spi/ich.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
> index a8b4d0d..784320f 100644
> --- a/drivers/spi/ich.c
> +++ b/drivers/spi/ich.c
> @@ -687,10 +687,10 @@ static int ich_spi_probe(struct udevice *bus)
>                 struct ich9_spi_regs *ich9_spi;
>
>                 ich9_spi = priv->base;
> -               bios_cntl = ich_readb(priv, ich9_spi->bcr);
> +               bios_cntl = readb(&ich9_spi->bcr);

Couldn't understand based on the commit message, So for BIOS protection
base shouldn't require or something?

It's not looks good to me to use generic io calls (readb|writeb) with
in the functionality
code though we have a private calls defined on top to use generic ones.

>                 bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
>                 bios_cntl |= 1;         /* Write Protect Disable (WPD) */
> -               ich_writeb(priv, bios_cntl, ich9_spi->bcr);
> +               writeb(bios_cntl, &ich9_spi->bcr);
>         } else {
>                 pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
>                 if (plat->ich_version == 9)
> --
> 2.2.0.rc0.207.ga3a616c
>

thanks!
Bin Meng June 8, 2015, 11:45 p.m. UTC | #3
Hi Jagan,

On Tue, Jun 9, 2015 at 1:58 AM, Jagan Teki <jteki@openedev.com> wrote:
> Hi Simon,
>
> On 7 June 2015 at 20:20, Simon Glass <sjg@chromium.org> wrote:
>> The logic is incorrect and currently has no effect. Fix it so that we can
>> write to SPI flash, since by default it is write-protected.
>>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>> ---
>>
>>  drivers/spi/ich.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
>> index a8b4d0d..784320f 100644
>> --- a/drivers/spi/ich.c
>> +++ b/drivers/spi/ich.c
>> @@ -687,10 +687,10 @@ static int ich_spi_probe(struct udevice *bus)
>>                 struct ich9_spi_regs *ich9_spi;
>>
>>                 ich9_spi = priv->base;
>> -               bios_cntl = ich_readb(priv, ich9_spi->bcr);
>> +               bios_cntl = readb(&ich9_spi->bcr);
>
> Couldn't understand based on the commit message, So for BIOS protection
> base shouldn't require or something?
>

This is because ich9_spi->bcr is the full address (i.e. not just
offset of the register like the others in this driver file)

> It's not looks good to me to use generic io calls (readb|writeb) with
> in the functionality
> code though we have a private calls defined on top to use generic ones.
>

Then we need make ich9_spi->bcr become its offset, so the private
calls can be used.

>>                 bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
>>                 bios_cntl |= 1;         /* Write Protect Disable (WPD) */
>> -               ich_writeb(priv, bios_cntl, ich9_spi->bcr);
>> +               writeb(bios_cntl, &ich9_spi->bcr);
>>         } else {
>>                 pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
>>                 if (plat->ich_version == 9)
>> --

Regards,
Bin
diff mbox

Patch

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index a8b4d0d..784320f 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -687,10 +687,10 @@  static int ich_spi_probe(struct udevice *bus)
 		struct ich9_spi_regs *ich9_spi;
 
 		ich9_spi = priv->base;
-		bios_cntl = ich_readb(priv, ich9_spi->bcr);
+		bios_cntl = readb(&ich9_spi->bcr);
 		bios_cntl &= ~(1 << 5);	/* clear Enable InSMM_STS (EISS) */
 		bios_cntl |= 1;		/* Write Protect Disable (WPD) */
-		ich_writeb(priv, bios_cntl, ich9_spi->bcr);
+		writeb(bios_cntl, &ich9_spi->bcr);
 	} else {
 		pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
 		if (plat->ich_version == 9)