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[v4,3/8] target-sh4: optimize addc using add2

Message ID 1433447480-30848-4-git-send-email-aurelien@aurel32.net
State New
Headers show

Commit Message

Aurelien Jarno June 4, 2015, 7:51 p.m. UTC 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-sh4/translate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

Comments

Richard Henderson June 9, 2015, 2:15 p.m. UTC | #1 
On 06/04/2015 12:51 PM, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno<aurelien@aurel32.net>
> ---
>   target-sh4/translate.c | 11 ++++-------
>   1 file changed, 4 insertions(+), 7 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~
diff mbox

Patch

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index bcdf4f3..5c90fe3 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -644,15 +644,12 @@  static void _decode_opc(DisasContext * ctx)
     case 0x300e:		/* addc Rm,Rn */
         {
             TCGv t0, t1;
-            t0 = tcg_temp_new();
+            t0 = tcg_const_tl(0);
             t1 = tcg_temp_new();
-            tcg_gen_add_i32(t0, REG(B7_4), REG(B11_8));
-            tcg_gen_add_i32(t1, cpu_sr_t, t0);
-            tcg_gen_setcond_i32(TCG_COND_GTU, cpu_sr_t, REG(B11_8), t0);
-            tcg_gen_setcond_i32(TCG_COND_GTU, t0, t0, t1);
-            tcg_gen_or_i32(cpu_sr_t, cpu_sr_t, t0);
+            tcg_gen_add2_i32(t1, cpu_sr_t, cpu_sr_t, t0, REG(B7_4), t0);
+            tcg_gen_add2_i32(REG(B11_8), cpu_sr_t,
+                             REG(B11_8), t0, t1, cpu_sr_t);
             tcg_temp_free(t0);
-            tcg_gen_mov_i32(REG(B11_8), t1);
             tcg_temp_free(t1);
         }
 	return;