| Message ID | 1268800916-14247-1-git-send-email-galak@kernel.crashing.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Commit | 9d296cfa69b3d4abc9d556986d544f0727988eed |
| Headers | show |
Kumar Gala wrote: > We shouldn't be always setting 'M' in the TLB entry since its reasonable > for somethings to be mapped non-coherent. The PTE should have 'M' set > properly. properly = not at all? AFAICS the patch only removes the setting of the bit; so where is that 'M' bit set then? Micha
On Mar 18, 2010, at 2:02 AM, Micha Nelissen wrote: > Kumar Gala wrote: >> We shouldn't be always setting 'M' in the TLB entry since its reasonable >> for somethings to be mapped non-coherent. The PTE should have 'M' set >> properly. > > properly = not at all? AFAICS the patch only removes the setting of the bit; so where is that 'M' bit set then? > > Micha Its set via things like the _PAGE_BASE define in arch/powerpc/include/asm/pte-common.h - k
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 25793bb..a7cf493 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -747,9 +747,6 @@ finish_tlb_load: #else rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */ #endif -#ifdef CONFIG_SMP - ori r12, r12, MAS2_M -#endif mtspr SPRN_MAS2, r12 #ifdef CONFIG_PTE_64BIT
We shouldn't be always setting 'M' in the TLB entry since its reasonable for somethings to be mapped non-coherent. The PTE should have 'M' set properly. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> --- arch/powerpc/kernel/head_fsl_booke.S | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)