diff mbox

[U-Boot] MIPS: fix missing semicolon in cacheops.h

Message ID 20150530150115-tung7970@googlemail.com
State Accepted
Delegated to: Daniel Schwierzeck
Headers show

Commit Message

Tony Wu May 30, 2015, 7:02 a.m. UTC 
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>

Comments

Daniel Schwierzeck May 31, 2015, 6:14 p.m. UTC | #1 
Am 30.05.2015 um 09:02 schrieb Tony Wu:
> Fix missing semicolon in cacheops.h introduced in commit
> 2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)
> 
> Signed-off-by: Tony Wu <tung7970@gmail.com>
> Cc: Paul Burton <paul.burton@imgtec.com>
> 

applied to u-boot-mips, thanks
diff mbox

Patch

diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 75ec380..af2adc7 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -18,7 +18,7 @@  static inline void mips_cache(int op, const volatile void *addr)
 #ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE
 	__builtin_mips_cache(op, addr);
 #else
-	__asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr))
+	__asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr));
 #endif
 }