Message ID | 555B327F.3090107@foss.arm.com |
---|---|
State | New |
Headers | show |
> On May 19, 2015, at 5:54 AM, Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com> wrote: > > Hi, > > Like the ARM port, the AArch64 ports needs to set glibc_integral_traps to false as integer divide instructions do not trap. > > Bootstrapped and regression tested on aarch64-none-linux-gnu > > Ok to apply ? Not really questioning your patch but questioning libstdc++'s defaults. I wonder if this should be the default as most targets don't trap, only a few that does. And it should be safer default to say they don't trap too? Thanks, Andrew > > regards > Ramana > > > 2015-05-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> > > * configure.host: Define cpu_defines_dir for AArch64 > * config/cpu/aarch64/cpu_defines.h: New file. > <0002-Do-the-same-for-AArch64.patch>
On Tue, May 19, 2015 at 4:54 PM, <pinskia@gmail.com> wrote: > > > > >> On May 19, 2015, at 5:54 AM, Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com> wrote: >> >> Hi, >> >> Like the ARM port, the AArch64 ports needs to set glibc_integral_traps to false as integer divide instructions do not trap. >> >> Bootstrapped and regression tested on aarch64-none-linux-gnu >> >> Ok to apply ? > > Not really questioning your patch but questioning libstdc++'s defaults. > I wonder if this should be the default as most targets don't trap, only a few that does. And it should be safer default to say they don't trap too? How about we #error out if targets do *not* define some of these defaults in libstdc++ ? There are far more ports with weak memory models, and the defaults for _GLIBCXX_READ/WRITE_BARRIER also appear unsafe . I was toying with a patch like that to force targets to define this sort of thing but I need to read more of configure.host before I make up my mind. regards Ramana > > Thanks, > Andrew > > >> >> regards >> Ramana >> >> >> 2015-05-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> >> >> * configure.host: Define cpu_defines_dir for AArch64 >> * config/cpu/aarch64/cpu_defines.h: New file. >> <0002-Do-the-same-for-AArch64.patch>
On 19/05/15 17:03, Ramana Radhakrishnan wrote: > On Tue, May 19, 2015 at 4:54 PM, <pinskia@gmail.com> wrote: >>> On May 19, 2015, at 5:54 AM, Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com> wrote: >>> Like the ARM port, the AArch64 ports needs to set glibc_integral_traps to false as integer divide instructions do not trap. >>> >>> Bootstrapped and regression tested on aarch64-none-linux-gnu >>> >>> Ok to apply ? >> >> Not really questioning your patch but questioning libstdc++'s defaults. >> I wonder if this should be the default as most targets don't trap, only a few that does. And it should be safer default to say they don't trap too? > > How about we #error out if targets do *not* define some of these > defaults in libstdc++ ? __glibcxx_integral_traps seems to be used for the 'traps' numeric_limits<T> member. i think it can only be meaningful if LIA-1 is properly supported (eg. div-by-zero is never optimized away) otherwise the standard dictates UB and anything can happen. (Note that LIA-1 also requires well-defined semantics for signed int overflow). i don't see a way for conforming c++ code to use traps, or for the library to guarantee either traps==true or traps==false on any machine.
From 1e38b2a848a313e5b98494094b198b7a1e34c59c Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> Date: Mon, 18 May 2015 15:45:49 +0100 Subject: [PATCH 2/2] Do the same for AArch64. --- libstdc++-v3/config/cpu/aarch64/cpu_defines.h | 36 +++++++++++++++++++++++++++ libstdc++-v3/configure.host | 3 +++ 2 files changed, 39 insertions(+) create mode 100644 libstdc++-v3/config/cpu/aarch64/cpu_defines.h diff --git a/libstdc++-v3/config/cpu/aarch64/cpu_defines.h b/libstdc++-v3/config/cpu/aarch64/cpu_defines.h new file mode 100644 index 0000000..d5a6fd0 --- /dev/null +++ b/libstdc++-v3/config/cpu/aarch64/cpu_defines.h @@ -0,0 +1,36 @@ +// Specific definitions for generic platforms -*- C++ -*- + +// Copyright (C) 2015 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// Under Section 7 of GPL version 3, you are granted additional +// permissions described in the GCC Runtime Library Exception, version +// 3.1, as published by the Free Software Foundation. + +// You should have received a copy of the GNU General Public License and +// a copy of the GCC Runtime Library Exception along with this program; +// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +// <http://www.gnu.org/licenses/>. + +/** @file bits/cpu_defines.h + * This is an internal header file, included by other library headers. + * Do not attempt to use it directly. @headername{iosfwd} + */ + +#ifndef _GLIBCXX_CPU_DEFINES +#define _GLIBCXX_CPU_DEFINES 1 + +// Integer divide instructions don't trap on AArch64. +#define __glibcxx_integral_traps false + +#endif diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host index 465a40a..b1ca7b7 100644 --- a/libstdc++-v3/configure.host +++ b/libstdc++-v3/configure.host @@ -143,6 +143,9 @@ cpu_include_dir=cpu/${try_cpu} # Set specific CPU overrides for cpu_defines_dir. Most can just use generic. # THIS TABLE IS SORTED. KEEP IT THAT WAY. case "${host_cpu}" in + aarch64*) + cpu_defines_dir=cpu/aarch64 + ;; arm*) cpu_defines_dir=cpu/arm ;; -- 1.9.1