From patchwork Thu Mar 11 13:39:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 47325 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 04337B7CFA for ; Fri, 12 Mar 2010 01:01:01 +1100 (EST) Received: from localhost ([127.0.0.1]:56104 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NpitQ-0002O7-5p for incoming@patchwork.ozlabs.org; Thu, 11 Mar 2010 08:57:40 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Npibw-0005aW-Gh for qemu-devel@nongnu.org; Thu, 11 Mar 2010 08:39:36 -0500 Received: from [199.232.76.173] (port=45897 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Npibv-0005a8-He for qemu-devel@nongnu.org; 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Thu, 11 Mar 2010 05:39:18 -0800 Received: from sausexmb1.amd.com ([163.181.3.156]) by storexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 11 Mar 2010 08:39:14 -0500 Received: from seurexmb1.amd.com ([165.204.9.130]) by sausexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 11 Mar 2010 07:39:02 -0600 Received: from gwo.osrc.amd.com ([165.204.16.204]) by seurexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 11 Mar 2010 14:38:55 +0100 Received: from localhost.localdomain (tronje.osrc.amd.com [165.204.15.48]) by gwo.osrc.amd.com (Postfix) with ESMTP id C834E49C263; Thu, 11 Mar 2010 13:38:55 +0000 (GMT) From: Andre Przywara To: anthony@codemonkey.ws Date: Thu, 11 Mar 2010 14:39:04 +0100 Message-ID: <1268314747-11111-11-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.4 In-Reply-To: <1268314747-11111-1-git-send-email-andre.przywara@amd.com> References: <1268314747-11111-1-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 11 Mar 2010 13:38:56.0028 (UTC) FILETIME=[32499DC0:01CAC120] MIME-Version: 1.0 X-Reverse-DNS: ausb3extmailp02.amd.com X-detected-operating-system: by monty-python.gnu.org: Windows 2000 SP4, XP SP1+ Cc: Andre Przywara , qemu-devel@nongnu.org, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 10/13] x86/cpuid: Always expose 32 and 64-bit CPUs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since 64-bit capability is just another CPUID bit we now properly mask, there is no reason anymore to hide the 64-bit capable CPU models from a 32-bit only QEMU. All 64-bit CPUs can be used perfectly in 32-bit legacy mode anyway, so these models also make sense for 32-bit. Signed-off-by: Andre Przywara --- target-i386/cpuid.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index a6b2362..e7e9228 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -250,7 +250,6 @@ static x86_def_t *x86_defs = {NULL}; /* built-in cpu model definitions (deprecated) */ static x86_def_t builtin_x86_defs[] = { -#ifdef TARGET_X86_64 { .name = "qemu64", .level = 4, @@ -349,7 +348,6 @@ static x86_def_t builtin_x86_defs[] = { .xlevel = 0x80000008, .model_id = "Common KVM processor" }, -#endif { .name = "qemu32", .level = 4,