Message ID | 55525366.7030206@gmail.com |
---|---|
State | Accepted |
Headers | show |
On 12/05/2015 21:24, Heiner Kallweit wrote: > Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. > Reason is that all bits in the port 6 config are zero. > This means that also the aneg flag is not set and in this case > ar8216_read_port_link hardcodes the link to be up. > > This is no real problem but a little annoying. > To fix this initialize port 6 with the aneg bit enabled. > This causes ar8216_read_port_link to evaluate the link status bit which is > always zero for port 6 as no PHY is connected to this port. > And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. are you sure ? dangling ports that are powered up tend to eat up power and convert it to heat. i would tend to nack this patch. John > Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> > --- > target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts > index 7e48e23..2beb39c 100644 > --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts > +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts > @@ -103,6 +103,7 @@ > 0x00058 0xcf35cf35 /* LED_CTRL2 */ > 0x0005c 0x03ffff00 /* LED_CTRL3 */ > 0x0007c 0x0000007e /* PORT0_STATUS */ > + 0x00094 0x00000200 /* PORT6_STATUS */ > >; > }; > }; >
Am 22.05.2015 um 15:52 schrieb John Crispin: > > > On 12/05/2015 21:24, Heiner Kallweit wrote: >> Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. >> Reason is that all bits in the port 6 config are zero. >> This means that also the aneg flag is not set and in this case >> ar8216_read_port_link hardcodes the link to be up. >> >> This is no real problem but a little annoying. >> To fix this initialize port 6 with the aneg bit enabled. >> This causes ar8216_read_port_link to evaluate the link status bit which is >> always zero for port 6 as no PHY is connected to this port. >> And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. > > are you sure ? dangling ports that are powered up tend to eat up power > and convert it to heat. i would tend to nack this patch. > > John Port 6 has a xMII/SERDES interface only and no PHY. It's meant to be connected to some "WAN device chip" to separate WAN / LAN w/o the need for a VLAN config. I see nothing that could be powered up. And port 6 having aneg enabled is also the standard behavior for all platform-configured devices with AR8327/AR8337. Port 6 is not configured for them in the platform code causing the force_link flag not being set. And if the force_link flag is not set ar8327_get_port_init_status sets the ANEG flag only as port status. Heiner > >> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> >> --- >> target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >> index 7e48e23..2beb39c 100644 >> --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >> +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >> @@ -103,6 +103,7 @@ >> 0x00058 0xcf35cf35 /* LED_CTRL2 */ >> 0x0005c 0x03ffff00 /* LED_CTRL3 */ >> 0x0007c 0x0000007e /* PORT0_STATUS */ >> + 0x00094 0x00000200 /* PORT6_STATUS */ >> >; >> }; >> }; >> > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel >
On 22/05/2015 20:46, Heiner Kallweit wrote: > Am 22.05.2015 um 15:52 schrieb John Crispin: >> >> >> On 12/05/2015 21:24, Heiner Kallweit wrote: >>> Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. >>> Reason is that all bits in the port 6 config are zero. >>> This means that also the aneg flag is not set and in this case >>> ar8216_read_port_link hardcodes the link to be up. >>> >>> This is no real problem but a little annoying. >>> To fix this initialize port 6 with the aneg bit enabled. >>> This causes ar8216_read_port_link to evaluate the link status bit which is >>> always zero for port 6 as no PHY is connected to this port. >>> And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. >> >> are you sure ? dangling ports that are powered up tend to eat up power >> and convert it to heat. i would tend to nack this patch. >> >> John > Port 6 has a xMII/SERDES interface only and no PHY. > It's meant to be connected to some "WAN device chip" to separate WAN / LAN > w/o the need for a VLAN config. I see nothing that could be powered up. > > And port 6 having aneg enabled is also the standard behavior for all > platform-configured devices with AR8327/AR8337. > Port 6 is not configured for them in the platform code causing the force_link > flag not being set. > And if the force_link flag is not set ar8327_get_port_init_status > sets the ANEG flag only as port status. > ok, i misunderstood it in the first mail. > Heiner > >> >>> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> >>> --- >>> target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >>> index 7e48e23..2beb39c 100644 >>> --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >>> +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts >>> @@ -103,6 +103,7 @@ >>> 0x00058 0xcf35cf35 /* LED_CTRL2 */ >>> 0x0005c 0x03ffff00 /* LED_CTRL3 */ >>> 0x0007c 0x0000007e /* PORT0_STATUS */ >>> + 0x00094 0x00000200 /* PORT6_STATUS */ >>> >; >>> }; >>> }; >>> >> _______________________________________________ >> openwrt-devel mailing list >> openwrt-devel@lists.openwrt.org >> https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel >> > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel >
diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts index 7e48e23..2beb39c 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts @@ -103,6 +103,7 @@ 0x00058 0xcf35cf35 /* LED_CTRL2 */ 0x0005c 0x03ffff00 /* LED_CTRL3 */ 0x0007c 0x0000007e /* PORT0_STATUS */ + 0x00094 0x00000200 /* PORT6_STATUS */ >; }; };
Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. Reason is that all bits in the port 6 config are zero. This means that also the aneg flag is not set and in this case ar8216_read_port_link hardcodes the link to be up. This is no real problem but a little annoying. To fix this initialize port 6 with the aneg bit enabled. This causes ar8216_read_port_link to evaluate the link status bit which is always zero for port 6 as no PHY is connected to this port. And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 1 + 1 file changed, 1 insertion(+)