| Message ID | 1430988871-2537-1-git-send-email-Priyanka.Jain@freescale.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On 05/07/2015 01:54 AM, Priyanka Jain wrote: > Update PBI command in pbi_cfg files to keep register bit > to default reset value while configuring CPC > as SRAM > > Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> > --- Applied to u-boot-mpc85xx master. Thanks. York
diff --git a/board/freescale/t102xqds/t1024_pbi.cfg b/board/freescale/t102xqds/t1024_pbi.cfg index 7b9e9b0..98efca2 100644 --- a/board/freescale/t102xqds/t1024_pbi.cfg +++ b/board/freescale/t102xqds/t1024_pbi.cfg @@ -6,7 +6,7 @@ #Configure CPC1 as 256KB SRAM 09010100 00000000 09010104 fffc0007 -09010f00 08000000 +09010f00 081e000d 09010000 80000000 #Configure LAW for CPC1 09000cd0 00000000 diff --git a/board/freescale/t102xrdb/t1024_pbi.cfg b/board/freescale/t102xrdb/t1024_pbi.cfg index 7b9e9b0..98efca2 100644 --- a/board/freescale/t102xrdb/t1024_pbi.cfg +++ b/board/freescale/t102xrdb/t1024_pbi.cfg @@ -6,7 +6,7 @@ #Configure CPC1 as 256KB SRAM 09010100 00000000 09010104 fffc0007 -09010f00 08000000 +09010f00 081e000d 09010000 80000000 #Configure LAW for CPC1 09000cd0 00000000 diff --git a/board/freescale/t1040qds/t1040_pbi.cfg b/board/freescale/t1040qds/t1040_pbi.cfg index 10b1a6d..121b005 100644 --- a/board/freescale/t1040qds/t1040_pbi.cfg +++ b/board/freescale/t1040qds/t1040_pbi.cfg @@ -6,7 +6,7 @@ #Configure CPC1 as 256KB SRAM 09010100 00000000 09010104 fffc0007 -09010f00 08000000 +09010f00 081e000d 09010000 80000000 #Configure LAW for CPC1 09000cf0 00000000 diff --git a/board/freescale/t104xrdb/t104x_pbi.cfg b/board/freescale/t104xrdb/t104x_pbi.cfg index b83b9b7..51945b4 100644 --- a/board/freescale/t104xrdb/t104x_pbi.cfg +++ b/board/freescale/t104xrdb/t104x_pbi.cfg @@ -16,7 +16,7 @@ #Configure CPC1 as 256KB SRAM 09010100 00000000 09010104 fffc0007 -09010f00 08000000 +09010f00 081e000d 09010000 80000000 #Configure LAW for CPC1 09000cd0 00000000
Update PBI command in pbi_cfg files to keep register bit to default reset value while configuring CPC as SRAM Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> --- board/freescale/t102xqds/t1024_pbi.cfg | 2 +- board/freescale/t102xrdb/t1024_pbi.cfg | 2 +- board/freescale/t1040qds/t1040_pbi.cfg | 2 +- board/freescale/t104xrdb/t104x_pbi.cfg | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)