diff mbox

[U-Boot,1/3] crypto/fsl - disable RNG oscillator maximum frequency check

Message ID 1430833715-18193-2-git-send-email-alexandru.porosanu@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Alex Porosanu May 5, 2015, 1:48 p.m. UTC
The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the
oscillator, when SEC runs at its maximum frequency. For certain platforms
(f.i. T2080), the oscillator is very fast and thus if the SEC runs at
a lower than normal frequency, the ring oscillator is incorrectly detected
as being out of bounds.

This patch effectively disables the maximum frequency check, by setting a
high enough maximum allowable frequency for the oscillator. The reasoning
behind this is that usually a broken oscillator will run too slow
(i.e. not run at all) rather than run too fast.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
---
 drivers/crypto/fsl/jr.c | 4 ++--
 include/fsl_sec.h       | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

Comments

Ruchika Gupta July 22, 2015, 4:37 p.m. UTC | #1
Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com>

> -----Original Message-----
> From: Sun York-R58495
> Sent: Sunday, July 19, 2015 3:43 AM
> To: Gupta Ruchika-R66431
> Subject: Re: [PATCH 1/3] crypto/fsl - disable RNG oscillator maximum
> frequency check
> 
> Ruchika,
> 
> Please comment/ack this patch and others in this set.
> 
> York
> 
> 
> On 05/05/2015 06:48 AM, Alex Porosanu wrote:
> > The rtfrqmax & rtfrqmin set the bounds of the expected frequency of
> > the oscillator, when SEC runs at its maximum frequency. For certain
> > platforms (f.i. T2080), the oscillator is very fast and thus if the
> > SEC runs at a lower than normal frequency, the ring oscillator is
> > incorrectly detected as being out of bounds.
> >
> > This patch effectively disables the maximum frequency check, by
> > setting a high enough maximum allowable frequency for the oscillator.
> > The reasoning behind this is that usually a broken oscillator will run
> > too slow (i.e. not run at all) rather than run too fast.
> >
> > Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
> > ---
> >  drivers/crypto/fsl/jr.c | 4 ++--
> >  include/fsl_sec.h       | 1 +
> >  2 files changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index
> > f99d594..aa527ec 100644
> > --- a/drivers/crypto/fsl/jr.c
> > +++ b/drivers/crypto/fsl/jr.c
> > @@ -406,8 +406,8 @@ static void kick_trng(int ent_delay)
> >  	sec_out32(&rng->rtsdctl, val);
> >  	/* min. freq. count, equal to 1/4 of the entropy sample length */
> >  	sec_out32(&rng->rtfreqmin, ent_delay >> 2);
> > -	/* max. freq. count, equal to 8 times the entropy sample length */
> > -	sec_out32(&rng->rtfreqmax, ent_delay << 3);
> > +	/* disable maximum frequency count */
> > +	sec_out32(&rng->rtfreqmax, RTFRQMAX_DISABLE);
> >  	/* put RNG4 into run mode */
> >  	sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM);  } diff --git
> > a/include/fsl_sec.h b/include/fsl_sec.h index ebb1ac6..14f6633 100644
> > --- a/include/fsl_sec.h
> > +++ b/include/fsl_sec.h
> > @@ -49,6 +49,7 @@ struct rng4tst {
> >  		u32 rttotsam;	/* PRGM=0: total samples register */
> >  	};
> >  	u32 rtfreqmin;		/* frequency count min. limit register */
> > +#define RTFRQMAX_DISABLE       (1 << 20)
> >  	union {
> >  		u32 rtfreqmax;	/* PRGM=1: freq. count max. limit register */
> >  		u32 rtfreqcnt;	/* PRGM=0: freq. count register */
> >
York Sun Aug. 4, 2015, 3:51 p.m. UTC | #2
On 05/05/2015 06:48 AM, Alex Porosanu wrote:
> The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the
> oscillator, when SEC runs at its maximum frequency. For certain platforms
> (f.i. T2080), the oscillator is very fast and thus if the SEC runs at
> a lower than normal frequency, the ring oscillator is incorrectly detected
> as being out of bounds.
> 
> This patch effectively disables the maximum frequency check, by setting a
> high enough maximum allowable frequency for the oscillator. The reasoning
> behind this is that usually a broken oscillator will run too slow
> (i.e. not run at all) rather than run too fast.
> 
> Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
> ---

Applied to u-boot-fsl-qoriq master with minor change in subject. Thanks.

York
diff mbox

Patch

diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index f99d594..aa527ec 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -406,8 +406,8 @@  static void kick_trng(int ent_delay)
 	sec_out32(&rng->rtsdctl, val);
 	/* min. freq. count, equal to 1/4 of the entropy sample length */
 	sec_out32(&rng->rtfreqmin, ent_delay >> 2);
-	/* max. freq. count, equal to 8 times the entropy sample length */
-	sec_out32(&rng->rtfreqmax, ent_delay << 3);
+	/* disable maximum frequency count */
+	sec_out32(&rng->rtfreqmax, RTFRQMAX_DISABLE);
 	/* put RNG4 into run mode */
 	sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM);
 }
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index ebb1ac6..14f6633 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -49,6 +49,7 @@  struct rng4tst {
 		u32 rttotsam;	/* PRGM=0: total samples register */
 	};
 	u32 rtfreqmin;		/* frequency count min. limit register */
+#define RTFRQMAX_DISABLE       (1 << 20)
 	union {
 		u32 rtfreqmax;	/* PRGM=1: freq. count max. limit register */
 		u32 rtfreqcnt;	/* PRGM=0: freq. count register */