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[2/3] soc/tegra: fuse: Add spare bit offset for Tegra124

Message ID 1430750923-23682-2-git-send-email-thierry.reding@gmail.com
State Superseded, archived
Headers show

Commit Message

Thierry Reding May 4, 2015, 2:48 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

The offset of the first spare bit register on Tegra124 is 0x300.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/fuse/fuse-tegra30.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox

Patch

diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index a55664fda81e..ff409b4a0e36 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -131,6 +131,7 @@  const struct tegra_fuse_soc tegra114_fuse_soc = {
 static const struct tegra_fuse_info tegra124_fuse_info = {
 	.read = tegra30_fuse_read,
 	.size = 0x300,
+	.spare = 0x300,
 };
 
 const struct tegra_fuse_soc tegra124_fuse_soc = {