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[U-Boot,1/5,v2] x86: baytrail: fix the GPIOBASE address

Message ID 1429992869-10166-1-git-send-email-contact@huau-gabriel.fr
State Superseded
Delegated to: Simon Glass
Headers show

Commit Message

Gabriel Huau April 25, 2015, 8:14 p.m. UTC
The correct GPIOBASE address on the baytrail is 0x48

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
---
Changes for v2:
	- Add a commit message

 arch/x86/include/asm/arch-baytrail/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h
index ab4e059..4e8987c 100644
--- a/arch/x86/include/asm/arch-baytrail/gpio.h
+++ b/arch/x86/include/asm/arch-baytrail/gpio.h
@@ -8,6 +8,6 @@ 
 #define _X86_ARCH_GPIO_H_
 
 /* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
+#define PCI_CFG_GPIOBASE 0x48
 
 #endif /* _X86_ARCH_GPIO_H_ */