diff mbox

[ARM] Fix pr42172-1.c failure on pre armv7 processors

Message ID 000801d07cd8$42809e90$c781dbb0$@arm.com
State New
Headers show

Commit Message

Bin Cheng April 22, 2015, 8:42 a.m. UTC
Hi,
Case pr42172-1.c failed on pre-armv7 processors because GCC actually
generates better code without ldr instruction.  This patch just refines test
case by checking str instead of ldr, makes sure the case passes on all arm
processors.  In the end, we need to fix GCC combiner to generate optimal
code on armv7 processors too.  PR42172 is kept open for that purpose.

This is obvious change, is it OK for branches too?

gcc/testsuite/ChangeLog
2015-04-22  Bin Cheng  <bin.cheng@arm.com>

	* gcc.target/arm/pr42172-1.c: Check str instead of ldr.

Comments

Kyrylo Tkachov April 23, 2015, 8:19 a.m. UTC | #1
On 22/04/15 09:42, Bin Cheng wrote:
> Hi,
> Case pr42172-1.c failed on pre-armv7 processors because GCC actually
> generates better code without ldr instruction.  This patch just refines test
> case by checking str instead of ldr, makes sure the case passes on all arm
> processors.  In the end, we need to fix GCC combiner to generate optimal
> code on armv7 processors too.  PR42172 is kept open for that purpose.
>
> This is obvious change, is it OK for branches too?

For the record, for -mcpu=arm7tdmi we now generate:
init_A:
         mov     r3, #8
         strb    r3, [r0]
         bx


Ok for trunk. Is this test failing on the branches too?

Kyrill

>
> gcc/testsuite/ChangeLog
> 2015-04-22  Bin Cheng  <bin.cheng@arm.com>
>
> 	* gcc.target/arm/pr42172-1.c: Check str instead of ldr.
>
Bin.Cheng April 23, 2015, 8:53 a.m. UTC | #2
On Thu, Apr 23, 2015 at 4:19 PM, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>
> On 22/04/15 09:42, Bin Cheng wrote:
>>
>> Hi,
>> Case pr42172-1.c failed on pre-armv7 processors because GCC actually
>> generates better code without ldr instruction.  This patch just refines
>> test
>> case by checking str instead of ldr, makes sure the case passes on all arm
>> processors.  In the end, we need to fix GCC combiner to generate optimal
>> code on armv7 processors too.  PR42172 is kept open for that purpose.
>>
>> This is obvious change, is it OK for branches too?
>
>
> For the record, for -mcpu=arm7tdmi we now generate:
> init_A:
>         mov     r3, #8
>         strb    r3, [r0]
>         bx
That's the point, it generates optimal code for pre-armv7 processors,
which is treated as failure now.

>
>
> Ok for trunk. Is this test failing on the branches too?
Well, at least for gcc-5-branch.

>
> Kyrill
>
>
>>
>> gcc/testsuite/ChangeLog
>> 2015-04-22  Bin Cheng  <bin.cheng@arm.com>
>>
>>         * gcc.target/arm/pr42172-1.c: Check str instead of ldr.
>>
>
Kyrylo Tkachov April 23, 2015, 9:04 a.m. UTC | #3
On 23/04/15 09:53, Bin.Cheng wrote:
> On Thu, Apr 23, 2015 at 4:19 PM, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>> On 22/04/15 09:42, Bin Cheng wrote:
>>> Hi,
>>> Case pr42172-1.c failed on pre-armv7 processors because GCC actually
>>> generates better code without ldr instruction.  This patch just refines
>>> test
>>> case by checking str instead of ldr, makes sure the case passes on all arm
>>> processors.  In the end, we need to fix GCC combiner to generate optimal
>>> code on armv7 processors too.  PR42172 is kept open for that purpose.
>>>
>>> This is obvious change, is it OK for branches too?
>>
>> For the record, for -mcpu=arm7tdmi we now generate:
>> init_A:
>>          mov     r3, #8
>>          strb    r3, [r0]
>>          bx
> That's the point, it generates optimal code for pre-armv7 processors,
> which is treated as failure now.
>
>>
>> Ok for trunk. Is this test failing on the branches too?
> Well, at least for gcc-5-branch.

If the GCC 5 branch is now open for commits (I think it is?), then ok there too.

Kyrill

>
>> Kyrill
>>
>>
>>> gcc/testsuite/ChangeLog
>>> 2015-04-22  Bin Cheng  <bin.cheng@arm.com>
>>>
>>>          * gcc.target/arm/pr42172-1.c: Check str instead of ldr.
>>>
diff mbox

Patch

diff --git a/gcc/testsuite/gcc.target/arm/pr42172-1.c b/gcc/testsuite/gcc.target/arm/pr42172-1.c
index 207f600..a3de02f 100644
--- a/gcc/testsuite/gcc.target/arm/pr42172-1.c
+++ b/gcc/testsuite/gcc.target/arm/pr42172-1.c
@@ -16,4 +16,4 @@  void init_A (struct A *this)
   this->f4 = 0;
 }
 
-/* { dg-final { scan-assembler-times "ldr" 1 } } */
+/* { dg-final { scan-assembler-times "str" 1 } } */