diff mbox

[AARCH64] Use mov for add with large immediate.

Message ID 55367660.5080808@arm.com
State New
Headers show

Commit Message

Renlin Li April 21, 2015, 4:10 p.m. UTC
Hi all,

This is a simple patch to generate a move instruction to temporarily 
hold the large immediate for a add instruction.

GCC regression test has been run using aarch64-none-elf toolchain. NO 
new issues.

Okay for trunk?

Regards,
Renlin Li

gcc/ChangeLog:

2015-04-21  Renlin Li  <renlin.li@arm.com>

     * config/aarch64/aarch64.md (add<mode>3): Use mov when allowed.

Comments

Marcus Shawcroft May 1, 2015, 10:19 a.m. UTC | #1
On 21 April 2015 at 17:10, Renlin Li <renlin.li@arm.com> wrote:
> Hi all,
>
> This is a simple patch to generate a move instruction to temporarily hold
> the large immediate for a add instruction.
>
> GCC regression test has been run using aarch64-none-elf toolchain. NO new
> issues.
>
> Okay for trunk?
>
> Regards,
> Renlin Li
>
> gcc/ChangeLog:
>
> 2015-04-21  Renlin Li  <renlin.li@arm.com>
>
>     * config/aarch64/aarch64.md (add<mode>3): Use mov when allowed.

A couple style nits:

       HOST_WIDE_INT imm = INTVAL (operands[2]);
-
-      if (imm < 0)

Don't remove the blank line between declarations and the first statement.

+      if (aarch64_move_imm (imm, <MODE>mode)
+  && can_create_pseudo_p ())
+      {

The indentation of { should conform to the gnu style guide.

It also  looks to me that  an unbroken line will fit within the 80
column limit, hence the break before && is unnecessary.

Cheers
/Marcus
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1f4169e..9ea1939 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1414,18 +1414,28 @@ 
   "
   if (! aarch64_plus_operand (operands[2], VOIDmode))
     {
-      rtx subtarget = ((optimize && can_create_pseudo_p ())
-		       ? gen_reg_rtx (<MODE>mode) : operands[0]);
       HOST_WIDE_INT imm = INTVAL (operands[2]);
-
-      if (imm < 0)
-	imm = -(-imm & ~0xfff);
+      if (aarch64_move_imm (imm, <MODE>mode)
+	  && can_create_pseudo_p ())
+      {
+	rtx tmp = gen_reg_rtx (<MODE>mode);
+	emit_move_insn (tmp, operands[2]);
+	operands[2] = tmp;
+      }
       else
-        imm &= ~0xfff;
+      {
+	rtx subtarget = ((optimize && can_create_pseudo_p ())
+			 ? gen_reg_rtx (<MODE>mode) : operands[0]);
+
+	if (imm < 0)
+	  imm = -(-imm & ~0xfff);
+	else
+	  imm &= ~0xfff;
 
-      emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
-      operands[1] = subtarget;
-      operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+	emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
+	operands[1] = subtarget;
+	operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+      }
     }
   "
 )