[4/6] q35: add test for SMRAM.D_LCK

---
 tests/Makefile     |  2 ++
 tests/smram-test.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 82 insertions(+)
 create mode 100644 tests/smram-test.c

On Mon, Apr 20, 2015 at 11:19:18AM +0200, Gerd Hoffmann wrote:
> ---


signature is missing.

Besides that

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>

>  tests/Makefile     |  2 ++
>  tests/smram-test.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 82 insertions(+)
>  create mode 100644 tests/smram-test.c
> 
> diff --git a/tests/Makefile b/tests/Makefile
> index 55aa745..cf2bd87 100644
> --- a/tests/Makefile
> +++ b/tests/Makefile
> @@ -174,6 +174,7 @@ gcov-files-i386-y += hw/usb/dev-storage.c
>  check-qtest-i386-y += tests/usb-hcd-xhci-test$(EXESUF)
>  gcov-files-i386-y += hw/usb/hcd-xhci.c
>  check-qtest-i386-y += tests/pc-cpu-test$(EXESUF)
> +check-qtest-i386-y += tests/smram-test$(EXESUF)
>  check-qtest-i386-$(CONFIG_LINUX) += tests/vhost-user-test$(EXESUF)
>  check-qtest-x86_64-y = $(check-qtest-i386-y)
>  gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c
> @@ -365,6 +366,7 @@ tests/usb-hcd-uhci-test$(EXESUF): tests/usb-hcd-uhci-test.o $(libqos-usb-obj-y)
>  tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-usb-obj-y)
>  tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o $(libqos-usb-obj-y)
>  tests/pc-cpu-test$(EXESUF): tests/pc-cpu-test.o
> +tests/smram-test$(EXESUF): tests/smram-test.o $(libqos-pc-obj-y)
>  tests/vhost-user-test$(EXESUF): tests/vhost-user-test.o qemu-char.o qemu-timer.o $(qtest-obj-y)
>  tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o
>  tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o libqemuutil.a libqemustub.a
> diff --git a/tests/smram-test.c b/tests/smram-test.c
> new file mode 100644
> index 0000000..339d5d1
> --- /dev/null
> +++ b/tests/smram-test.c
> @@ -0,0 +1,80 @@
> +#include <glib.h>
> +#include <string.h>
> +#include "libqtest.h"
> +#include "libqos/pci.h"
> +#include "libqos/pci-pc.h"
> +#include "qemu/osdep.h"
> +#include "hw/pci-host/q35.h"
> +
> +static void smram_set_bit(QPCIDevice *pcidev, uint8_t mask, bool enabled)
> +{
> +    uint8_t smram;
> +
> +    smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
> +    if (enabled) {
> +        smram |= mask;
> +    } else {
> +        smram &= ~mask;
> +    }
> +    qpci_config_writeb(pcidev, MCH_HOST_BRIDGE_SMRAM, smram);
> +}
> +
> +static bool smram_test_bit(QPCIDevice *pcidev, uint8_t mask)
> +{
> +    uint8_t smram;
> +
> +    smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
> +    return smram & mask;
> +}
> +
> +static void test_smram_lock(void)
> +{
> +    QPCIBus *pcibus;
> +    QPCIDevice *pcidev;
> +    QDict *response;
> +
> +    pcibus = qpci_init_pc();
> +    g_assert(pcibus != NULL);
> +
> +    pcidev = qpci_device_find(pcibus, 0);
> +    g_assert(pcidev != NULL);
> +
> +    /* check open is settable */
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
> +
> +    /* lock, check open is cleared & not settable */
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_LCK, true);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> +
> +    /* reset */
> +    response = qmp("{'execute': 'system_reset', 'arguments': {} }");
> +    g_assert(response);
> +    g_assert(!qdict_haskey(response, "error"));
> +    QDECREF(response);
> +
> +    /* check open is settable again */
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> +    smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> +    g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
> +}
> +
> +int main(int argc, char **argv)
> +{
> +    int ret;
> +
> +    g_test_init(&argc, &argv, NULL);
> +
> +    qtest_add_func("/smram/lock", test_smram_lock);
> +
> +    qtest_start("-M q35");
> +    ret = g_test_run();
> +    qtest_end();
> +
> +    return ret;
> +}
> -- 
> 1.8.3.1