| Message ID | 1429517754-7988-1-git-send-email-khandual@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
On 04/20/2015 01:45 PM, Anshuman Khandual wrote: > Currently tm_orig_msr is getting used during process context switch only. > Then there is ckpt_regs which saves the checkpointed userspace context > The MSR slot contained in ckpt_regs structure can be used during process > context switch instead of tm_orig_msr, thus allowing us to drop it from > thread_struct structure. This patch does that change. > > Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> > --- > This issue came up in the discussion regarding ptrace interface for TM > specific registers https://lkml.org/lkml/2015/4/20/100, so just wanted > to give this a try. The basic TM tests still pass after this change. Hey Michael/Mikey, Whats your thoughts on this ? Can we drop tm_orig_msr ?
On 04/24/2015 10:31 AM, Anshuman Khandual wrote: > On 04/20/2015 01:45 PM, Anshuman Khandual wrote: >> Currently tm_orig_msr is getting used during process context switch only. >> Then there is ckpt_regs which saves the checkpointed userspace context >> The MSR slot contained in ckpt_regs structure can be used during process >> context switch instead of tm_orig_msr, thus allowing us to drop it from >> thread_struct structure. This patch does that change. >> >> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> >> --- >> This issue came up in the discussion regarding ptrace interface for TM >> specific registers https://lkml.org/lkml/2015/4/20/100, so just wanted >> to give this a try. The basic TM tests still pass after this change. > > Hey Michael/Mikey, > > Whats your thoughts on this ? Can we drop tm_orig_msr ? Just wanted some inputs/suggestions/thoughts on this idea. Did not hear from any one on this. Will it create any problem any where if we drop this variable.
On Mon, 2015-04-20 at 13:45 +0530, Anshuman Khandual wrote: > Currently tm_orig_msr is getting used during process context switch only. > Then there is ckpt_regs which saves the checkpointed userspace context > The MSR slot contained in ckpt_regs structure can be used during process > context switch instead of tm_orig_msr, thus allowing us to drop it from > thread_struct structure. This patch does that change. > > Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Thanks! > --- > This issue came up in the discussion regarding ptrace interface for TM > specific registers https://lkml.org/lkml/2015/4/20/100, so just wanted > to give this a try. The basic TM tests still pass after this change. > > arch/powerpc/include/asm/processor.h | 1 - > arch/powerpc/kernel/process.c | 14 +++++++------- > 2 files changed, 7 insertions(+), 8 deletions(-) > > diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h > index bf117d8..fc2a3135 100644 > --- a/arch/powerpc/include/asm/processor.h > +++ b/arch/powerpc/include/asm/processor.h > @@ -264,7 +264,6 @@ struct thread_struct { > u64 tm_tfhar; /* Transaction fail handler addr */ > u64 tm_texasr; /* Transaction exception & summary */ > u64 tm_tfiar; /* Transaction fail instr address reg */ > - unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */ > struct pt_regs ckpt_regs; /* Checkpointed registers */ > > unsigned long tm_tar; > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c > index febb50d..654830a 100644 > --- a/arch/powerpc/kernel/process.c > +++ b/arch/powerpc/kernel/process.c > @@ -86,7 +86,7 @@ void giveup_fpu_maybe_transactional(struct task_struct *tsk) > if (tsk == current && tsk->thread.regs && > MSR_TM_ACTIVE(tsk->thread.regs->msr) && > !test_thread_flag(TIF_RESTORE_TM)) { > - tsk->thread.tm_orig_msr = tsk->thread.regs->msr; > + tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; > set_thread_flag(TIF_RESTORE_TM); > } > > @@ -104,7 +104,7 @@ void giveup_altivec_maybe_transactional(struct task_struct *tsk) > if (tsk == current && tsk->thread.regs && > MSR_TM_ACTIVE(tsk->thread.regs->msr) && > !test_thread_flag(TIF_RESTORE_TM)) { > - tsk->thread.tm_orig_msr = tsk->thread.regs->msr; > + tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; > set_thread_flag(TIF_RESTORE_TM); > } > > @@ -543,7 +543,7 @@ static void tm_reclaim_thread(struct thread_struct *thr, > * the thread will no longer be transactional. > */ > if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) { > - msr_diff = thr->tm_orig_msr & ~thr->regs->msr; > + msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr; > if (msr_diff & MSR_FP) > memcpy(&thr->transact_fp, &thr->fp_state, > sizeof(struct thread_fp_state)); > @@ -594,10 +594,10 @@ static inline void tm_reclaim_task(struct task_struct *tsk) > /* Stash the original thread MSR, as giveup_fpu et al will > * modify it. We hold onto it to see whether the task used > * FP & vector regs. If the TIF_RESTORE_TM flag is set, > - * tm_orig_msr is already set. > + * ckpt_regs.msr is already set. > */ > if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM)) > - thr->tm_orig_msr = thr->regs->msr; > + thr->ckpt_regs.msr = thr->regs->msr; > > TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " > "ccr=%lx, msr=%lx, trap=%lx)\n", > @@ -666,7 +666,7 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new) > tm_restore_sprs(&new->thread); > return; > } > - msr = new->thread.tm_orig_msr; > + msr = new->thread.ckpt_regs.msr; > /* Recheckpoint to restore original checkpointed register state. */ > TM_DEBUG("*** tm_recheckpoint of pid %d " > "(new->msr 0x%lx, new->origmsr 0x%lx)\n", > @@ -726,7 +726,7 @@ void restore_tm_state(struct pt_regs *regs) > if (!MSR_TM_ACTIVE(regs->msr)) > return; > > - msr_diff = current->thread.tm_orig_msr & ~regs->msr; > + msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; > msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; > if (msr_diff & MSR_FP) { > fp_enable();
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index bf117d8..fc2a3135 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -264,7 +264,6 @@ struct thread_struct { u64 tm_tfhar; /* Transaction fail handler addr */ u64 tm_texasr; /* Transaction exception & summary */ u64 tm_tfiar; /* Transaction fail instr address reg */ - unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */ struct pt_regs ckpt_regs; /* Checkpointed registers */ unsigned long tm_tar; diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index febb50d..654830a 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -86,7 +86,7 @@ void giveup_fpu_maybe_transactional(struct task_struct *tsk) if (tsk == current && tsk->thread.regs && MSR_TM_ACTIVE(tsk->thread.regs->msr) && !test_thread_flag(TIF_RESTORE_TM)) { - tsk->thread.tm_orig_msr = tsk->thread.regs->msr; + tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; set_thread_flag(TIF_RESTORE_TM); } @@ -104,7 +104,7 @@ void giveup_altivec_maybe_transactional(struct task_struct *tsk) if (tsk == current && tsk->thread.regs && MSR_TM_ACTIVE(tsk->thread.regs->msr) && !test_thread_flag(TIF_RESTORE_TM)) { - tsk->thread.tm_orig_msr = tsk->thread.regs->msr; + tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; set_thread_flag(TIF_RESTORE_TM); } @@ -543,7 +543,7 @@ static void tm_reclaim_thread(struct thread_struct *thr, * the thread will no longer be transactional. */ if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) { - msr_diff = thr->tm_orig_msr & ~thr->regs->msr; + msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr; if (msr_diff & MSR_FP) memcpy(&thr->transact_fp, &thr->fp_state, sizeof(struct thread_fp_state)); @@ -594,10 +594,10 @@ static inline void tm_reclaim_task(struct task_struct *tsk) /* Stash the original thread MSR, as giveup_fpu et al will * modify it. We hold onto it to see whether the task used * FP & vector regs. If the TIF_RESTORE_TM flag is set, - * tm_orig_msr is already set. + * ckpt_regs.msr is already set. */ if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM)) - thr->tm_orig_msr = thr->regs->msr; + thr->ckpt_regs.msr = thr->regs->msr; TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " "ccr=%lx, msr=%lx, trap=%lx)\n", @@ -666,7 +666,7 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new) tm_restore_sprs(&new->thread); return; } - msr = new->thread.tm_orig_msr; + msr = new->thread.ckpt_regs.msr; /* Recheckpoint to restore original checkpointed register state. */ TM_DEBUG("*** tm_recheckpoint of pid %d " "(new->msr 0x%lx, new->origmsr 0x%lx)\n", @@ -726,7 +726,7 @@ void restore_tm_state(struct pt_regs *regs) if (!MSR_TM_ACTIVE(regs->msr)) return; - msr_diff = current->thread.tm_orig_msr & ~regs->msr; + msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; if (msr_diff & MSR_FP) { fp_enable();
Currently tm_orig_msr is getting used during process context switch only. Then there is ckpt_regs which saves the checkpointed userspace context The MSR slot contained in ckpt_regs structure can be used during process context switch instead of tm_orig_msr, thus allowing us to drop it from thread_struct structure. This patch does that change. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> --- This issue came up in the discussion regarding ptrace interface for TM specific registers https://lkml.org/lkml/2015/4/20/100, so just wanted to give this a try. The basic TM tests still pass after this change. arch/powerpc/include/asm/processor.h | 1 - arch/powerpc/kernel/process.c | 14 +++++++------- 2 files changed, 7 insertions(+), 8 deletions(-)