@@ -48,10 +48,16 @@ static void uart_zynq_serial_setbrg(const int port)
/* Calculation results. */
unsigned int calc_bauderror, bdiv, bgen;
unsigned long calc_baud = 0;
- unsigned long baud = gd->baudrate;
+ unsigned long baud;
unsigned long clock = get_uart_clk(port);
struct uart_zynq *regs = uart_zynq_ports[port];
+ /* Covering case where input clock is so slow */
+ if (clock < 1000000 && gd->baudrate > 9600)
+ gd->baudrate = 9600;
+
+ baud = gd->baudrate;
+
/* master clock
* Baud rate = ------------------
* bgen * (bdiv + 1)
On slow platforms not all baudrate setting is valid. Check it directly in the driver and setup maximum possible frequency. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- drivers/serial/serial_zynq.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)