From patchwork Sat Feb 20 18:24:07 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: target-mips: fix ROTR and DROTR by zero Date: Sat, 20 Feb 2010 08:24:07 -0000 From: Nathan Froyd X-Patchwork-Id: 45928 Message-Id: <1266690247-29046-1-git-send-email-froydnj@codesourcery.com> To: qemu-devel@nongnu.org Cc: aurelien@aurel32.net Signed-off-by: Nathan Froyd --- target-mips/translate.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index dfea6f6..de5ac18 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1476,6 +1476,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc, tcg_gen_rotri_i32(t1, t1, uimm); tcg_gen_ext_i32_tl(cpu_gpr[rt], t1); tcg_temp_free_i32(t1); + } else { + tcg_gen_ext32s_tl(cpu_gpr[rt], t0); } opn = "rotr"; break; @@ -1495,6 +1497,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc, case OPC_DROTR: if (uimm != 0) { tcg_gen_rotri_tl(cpu_gpr[rt], t0, uimm); + } else { + tcg_gen_mov_tl(cpu_gpr[rt], t0); } opn = "drotr"; break;