Patchwork target-mips: fix ROTR and DROTR by zero

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Submitter Nathan Froyd
Date Feb. 20, 2010, 6:24 p.m.
Message ID <1266690247-29046-1-git-send-email-froydnj@codesourcery.com>
Download mbox | patch
Permalink /patch/45928/
State New
Headers show

Comments

Nathan Froyd - Feb. 20, 2010, 6:24 p.m.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
---
 target-mips/translate.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
Aurelien Jarno - Feb. 23, 2010, 7:03 p.m.
On Sat, Feb 20, 2010 at 10:24:07AM -0800, Nathan Froyd wrote:
> 
> Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>

Thanks applied.

> ---
>  target-mips/translate.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index dfea6f6..de5ac18 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -1476,6 +1476,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
>              tcg_gen_rotri_i32(t1, t1, uimm);
>              tcg_gen_ext_i32_tl(cpu_gpr[rt], t1);
>              tcg_temp_free_i32(t1);
> +        } else {
> +            tcg_gen_ext32s_tl(cpu_gpr[rt], t0);
>          }
>          opn = "rotr";
>          break;
> @@ -1495,6 +1497,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
>      case OPC_DROTR:
>          if (uimm != 0) {
>              tcg_gen_rotri_tl(cpu_gpr[rt], t0, uimm);
> +        } else {
> +            tcg_gen_mov_tl(cpu_gpr[rt], t0);
>          }
>          opn = "drotr";
>          break;
> -- 
> 1.6.3.2
> 
> 
> 
>

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index dfea6f6..de5ac18 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1476,6 +1476,8 @@  static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
             tcg_gen_rotri_i32(t1, t1, uimm);
             tcg_gen_ext_i32_tl(cpu_gpr[rt], t1);
             tcg_temp_free_i32(t1);
+        } else {
+            tcg_gen_ext32s_tl(cpu_gpr[rt], t0);
         }
         opn = "rotr";
         break;
@@ -1495,6 +1497,8 @@  static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
     case OPC_DROTR:
         if (uimm != 0) {
             tcg_gen_rotri_tl(cpu_gpr[rt], t0, uimm);
+        } else {
+            tcg_gen_mov_tl(cpu_gpr[rt], t0);
         }
         opn = "drotr";
         break;