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[v3,4/4] powerpc/tm: Correct minor documentation typos

Message ID 9095bd465b988a5c3a96bb0b58713eddcd2b099c.1428368031.git.sam.bobroff@au1.ibm.com (mailing list archive)
State Superseded
Delegated to: Michael Ellerman
Headers show

Commit Message

Sam Bobroff April 7, 2015, 12:54 a.m. UTC 
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
---
v2:

Discovered some typos while updating the documentation.

 Documentation/powerpc/transactional_memory.txt |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/Documentation/powerpc/transactional_memory.txt b/Documentation/powerpc/transactional_memory.txt
index 98b39af..ba0a2a4 100644
--- a/Documentation/powerpc/transactional_memory.txt
+++ b/Documentation/powerpc/transactional_memory.txt
@@ -175,7 +175,7 @@  These are defined in <asm/reg.h>, and distinguish different reasons why the
 kernel aborted a transaction:
 
  TM_CAUSE_RESCHED       Thread was rescheduled.
- TM_CAUSE_TLBI          Software TLB invalide.
+ TM_CAUSE_TLBI          Software TLB invalid.
  TM_CAUSE_FAC_UNAV      FP/VEC/VSX unavailable trap.
  TM_CAUSE_SYSCALL       Syscall from active transaction.
  TM_CAUSE_SIGNAL        Signal delivered.
@@ -185,7 +185,7 @@  kernel aborted a transaction:
 
 These can be checked by the user program's abort handler as TEXASR[0:7].  If
 bit 7 is set, it indicates that the error is consider persistent.  For example
-a TM_CAUSE_ALIGNMENT will be persistent while a TM_CAUSE_RESCHED will not.q
+a TM_CAUSE_ALIGNMENT will be persistent while a TM_CAUSE_RESCHED will not.
 
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