| Message ID | 5515553A.7080303@codesourcery.com |
|---|---|
| State | New |
| Headers | show |
On 3/27/15 21:03, Bernd Schmidt wrote: > On 03/27/2015 01:05 AM, Chen Gang wrote: >> For misalignment memory access, c6x gcc will cause issue, so need remove >> "clobber (match_scratch ...)" which will be symmetric with "movmisalign >> <mode>_load", then pass compiling and generate correct assembly code. >> > >> * config/c6x/c6x.md (movmisalign<mode>_store): Remove "clobber >> (match_scratch ...)". > > No, that just will make the compiler confuse loads and stores. I've committed the following to fix it (I thought I'd done so a year ago, but probably it was one of those commit against an out-of-date tree situations and it didn't go through). > OK, thanks. Your patch is OK to me. And I shall try to find another c6x patches within this month (2015-03-31). Thanks.
On 3/28/15 09:32, Chen Gang wrote: > On 3/27/15 21:03, Bernd Schmidt wrote: >> On 03/27/2015 01:05 AM, Chen Gang wrote: >>> For misalignment memory access, c6x gcc will cause issue, so need remove >>> "clobber (match_scratch ...)" which will be symmetric with "movmisalign >>> <mode>_load", then pass compiling and generate correct assembly code. >>> >> >>> * config/c6x/c6x.md (movmisalign<mode>_store): Remove "clobber >>> (match_scratch ...)". >> >> No, that just will make the compiler confuse loads and stores. I've committed the following to fix it (I thought I'd done so a year ago, but probably it was one of those commit against an out-of-date tree situations and it didn't go through). >> > > OK, thanks. Your patch is OK to me. And I shall try to find another c6x > patches within this month (2015-03-31). > I have reported the related bug 65510, please continue for it, if I need to continue, please let me know. Thanks.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e4b6c1..d5535f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2015-03-27 Bernd Schmidt <bernds@codesourcery.com> + * config/c6x/c6x.md (movmisalign<mode>): Use MEM_P, not + memory_operand. + PR target/65052 * config/c6x/constraints.md (S3): New constraint. * config/c6x/c6x.md (real_jump): Use it. diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md index fafefa6..e957eca 100644 --- a/gcc/config/c6x/c6x.md +++ b/gcc/config/c6x/c6x.md @@ -775,7 +775,7 @@ UNSPEC_MISALIGNED_ACCESS))] "TARGET_INSNS_64" { - if (memory_operand (operands[0], <MODE>mode)) + if (MEM_P (operands[0])) { emit_insn (gen_movmisalign<mode>_store (operands[0], operands[1])); DONE;