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[U-Boot,4/6] ARM: vf610: Enable caches

Message ID d8b9aaf22cda192a1fae51046f3ae845336d2757.1427282314.git.maitysanchayan@gmail.com
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Sanchayan Maity March 25, 2015, 12:07 p.m. UTC 
From: Stefan Agner <stefan@agner.ch>

Enables caches which provides a rather huge speedup of the boot loader.
Also mark the on-chip RAM as cachable since this is the area U-Boot runs
from.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
 arch/arm/cpu/armv7/vf610/generic.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
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Patch

diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index 3bdc221..1bb9b8e 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -342,3 +342,19 @@  int get_clocks(void)
 #endif
 	return 0;
 }
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+	enum dcache_option option = DCACHE_WRITETHROUGH;
+#else
+	enum dcache_option option = DCACHE_WRITEBACK;
+#endif
+	dcache_enable();
+	icache_enable();
+
+    /* Enable caching on OCRAM */
+	mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option);
+}
+#endif