From patchwork Fri Feb 12 16:59:52 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 45189 X-Patchwork-Delegate: benh@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 117CDB7F3F for ; Sat, 13 Feb 2010 04:05:35 +1100 (EST) Received: by ozlabs.org (Postfix) id CF926B7CA1; Sat, 13 Feb 2010 04:05:25 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org X-Greylist: delayed 328 seconds by postgrey-1.32 at bilbo; Sat, 13 Feb 2010 04:05:25 EST Received: from g1t0028.austin.hp.com (g1t0028.austin.hp.com [15.216.28.35]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "smtp1.hp.com", Issuer "VeriSign Class 3 Secure Server CA - G2" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 692ABB6F0D for ; Sat, 13 Feb 2010 04:05:25 +1100 (EST) Received: from g1t0038.austin.hp.com (g1t0038.austin.hp.com [16.236.32.44]) by g1t0028.austin.hp.com (Postfix) with ESMTP id 91A491C14F; Fri, 12 Feb 2010 16:59:54 +0000 (UTC) Received: from ldl (ldl.fc.hp.com [15.11.146.30]) by g1t0038.austin.hp.com (Postfix) with ESMTP id A2DB1300B0; Fri, 12 Feb 2010 16:59:52 +0000 (UTC) Received: from localhost (ldl.fc.hp.com [127.0.0.1]) by ldl (Postfix) with ESMTP id 81F6ECF000F; Fri, 12 Feb 2010 09:59:52 -0700 (MST) Received: from ldl ([127.0.0.1]) by localhost (ldl.fc.hp.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LvBAv3NXANAT; Fri, 12 Feb 2010 09:59:52 -0700 (MST) Received: from eh.fc.hp.com (eh.fc.hp.com [15.11.146.105]) by ldl (Postfix) with ESMTP id 5C419CF0009; Fri, 12 Feb 2010 09:59:52 -0700 (MST) Received: from bob.kio (localhost [127.0.0.1]) by eh.fc.hp.com (Postfix) with ESMTP id 421F626396; Fri, 12 Feb 2010 09:59:52 -0700 (MST) Subject: [PATCH v3 1/7] PCI: split up pci_read_bridge_bases() To: Jesse Barnes From: Bjorn Helgaas Date: Fri, 12 Feb 2010 09:59:52 -0700 Message-ID: <20100212165952.19522.19555.stgit@bob.kio> In-Reply-To: <20100212165532.19522.47240.stgit@bob.kio> References: <20100212165532.19522.47240.stgit@bob.kio> User-Agent: StGit/0.15 MIME-Version: 1.0 Cc: Matthew Garrett , Tony Luck , linuxppc-dev@ozlabs.org, linux-pci@vger.kernel.org, Peter Haight , Gary Hade , linux-kernel@vger.kernel.org, Linus Torvalds , linux-acpi@vger.kernel.org, linux-am33-list@redhat.com, linux-alpha@vger.kernel.org, Ingo Molnar , Yinghai Lu , Larry Finger X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org No functional change; this breaks up pci_read_bridge_bases() into separate pieces for the I/O, memory, and prefetchable memory windows, similar to how Yinghai recently split up pci_setup_bridge() in 68e84ff3bdc. Signed-off-by: Bjorn Helgaas --- drivers/pci/probe.c | 54 +++++++++++++++++++++++++++++++++++++-------------- 1 files changed, 39 insertions(+), 15 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index d300943..3d305c1 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -281,26 +281,12 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) } } -void __devinit pci_read_bridge_bases(struct pci_bus *child) +static void __devinit pci_read_bridge_io(struct pci_bus *child) { struct pci_dev *dev = child->self; u8 io_base_lo, io_limit_lo; - u16 mem_base_lo, mem_limit_lo; unsigned long base, limit; struct resource *res; - int i; - - if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ - return; - - dev_info(&dev->dev, "PCI bridge to [bus %02x-%02x]%s\n", - child->secondary, child->subordinate, - dev->transparent ? " (subtractive decode)": ""); - - if (dev->transparent) { - for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++) - child->resource[i] = child->parent->resource[i - 3]; - } res = child->resource[0]; pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo); @@ -328,6 +314,14 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) " bridge window [io %04lx - %04lx] reg reading\n", base, limit); } +} + +static void __devinit pci_read_bridge_mmio(struct pci_bus *child) +{ + struct pci_dev *dev = child->self; + u16 mem_base_lo, mem_limit_lo; + unsigned long base, limit; + struct resource *res; res = child->resource[1]; pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo); @@ -344,6 +338,14 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) " bridge window [mem 0x%08lx - 0x%08lx] reg reading\n", base, limit + 0xfffff); } +} + +static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child) +{ + struct pci_dev *dev = child->self; + u16 mem_base_lo, mem_limit_lo; + unsigned long base, limit; + struct resource *res; res = child->resource[2]; pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo); @@ -389,6 +391,28 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) } } +void __devinit pci_read_bridge_bases(struct pci_bus *child) +{ + struct pci_dev *dev = child->self; + int i; + + if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ + return; + + dev_info(&dev->dev, "PCI bridge to [bus %02x-%02x]%s\n", + child->secondary, child->subordinate, + dev->transparent ? " (subtractive decode)": ""); + + if (dev->transparent) { + for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++) + child->resource[i] = child->parent->resource[i - 3]; + } + + pci_read_bridge_io(child); + pci_read_bridge_mmio(child); + pci_read_bridge_mmio_pref(child); +} + static struct pci_bus * pci_alloc_bus(void) { struct pci_bus *b;