[v2] pinctrl: tegra: use signed bitfields for optional fields
diff mbox

Message ID 1426542154-31072-1-git-send-email-stefan@agner.ch
State New
Headers show

Commit Message

Stefan Agner March 16, 2015, 9:42 p.m. UTC
Optional fields are set to -1 by various preprocessor macros. Make
sure the fields can actually store them.

Signed-off-by: Stefan Agner <stefan@agner.ch>
---
With that, sizes are back to normal:

   text	   data	    bss	    dec	    hex	filename
   5406	    180	      1	   5587	   15d3	drivers/pinctrl/pinctrl-tegra-xusb.o
   5256	     64	      0	   5320	   14c8	drivers/pinctrl/pinctrl-tegra.o
  18072	   1032	      0	  19104	   4aa0	drivers/pinctrl/pinctrl-tegra114.o
  19214	   1128	      0	  20342	   4f76	drivers/pinctrl/pinctrl-tegra124.o
  18352	    876	      0	  19228	   4b1c	drivers/pinctrl/pinctrl-tegra20.o
  24621	   1068	      0	  25689	   6459	drivers/pinctrl/pinctrl-tegra30.o

 drivers/pinctrl/pinctrl-tegra.h | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

Comments

Stephen Warren March 16, 2015, 10:28 p.m. UTC | #1
On 03/16/2015 03:42 PM, Stefan Agner wrote:
> Optional fields are set to -1 by various preprocessor macros. Make
> sure the fields can actually store them.

This seems fine to me. I suppose there is a small risk that the old code 
let some invalid configurations pass whereas this new code will reject 
them and hence not program any later pinmux configurations in the "list" 
in DT. However, I suspect the risk is quite small and won't be an issue.

Acked-by: Stephen Warren <swarren@nvidia.com>

I also tested this on Beaver, Dalmore, and Jetson TK1 using Paul 
Walmsley's automated test system, and saw no issues, so:

Tested-by: Stephen Warren <swarren@nvidia.com>
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Linus Walleij March 19, 2015, 8:21 a.m. UTC | #2
On Mon, Mar 16, 2015 at 10:42 PM, Stefan Agner <stefan@agner.ch> wrote:

> Optional fields are set to -1 by various preprocessor macros. Make
> sure the fields can actually store them.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>

Patch applied with Stephen's ACK/Test tags.

Yours,
Linus Walleij
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Patch
diff mbox

diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h
index 8d94d13..b8a82a3 100644
--- a/drivers/pinctrl/pinctrl-tegra.h
+++ b/drivers/pinctrl/pinctrl-tegra.h
@@ -139,26 +139,26 @@  struct tegra_pingroup {
 	u32 pupd_bank:2;
 	u32 tri_bank:2;
 	u32 drv_bank:2;
-	u32 mux_bit:6;
-	u32 pupd_bit:6;
-	u32 tri_bit:6;
-	u32 einput_bit:6;
-	u32 odrain_bit:6;
-	u32 lock_bit:6;
-	u32 ioreset_bit:6;
-	u32 rcv_sel_bit:6;
-	u32 hsm_bit:6;
-	u32 schmitt_bit:6;
-	u32 lpmd_bit:6;
-	u32 drvdn_bit:6;
-	u32 drvup_bit:6;
-	u32 slwr_bit:6;
-	u32 slwf_bit:6;
-	u32 drvtype_bit:6;
-	u32 drvdn_width:6;
-	u32 drvup_width:6;
-	u32 slwr_width:6;
-	u32 slwf_width:6;
+	s32 mux_bit:6;
+	s32 pupd_bit:6;
+	s32 tri_bit:6;
+	s32 einput_bit:6;
+	s32 odrain_bit:6;
+	s32 lock_bit:6;
+	s32 ioreset_bit:6;
+	s32 rcv_sel_bit:6;
+	s32 hsm_bit:6;
+	s32 schmitt_bit:6;
+	s32 lpmd_bit:6;
+	s32 drvdn_bit:6;
+	s32 drvup_bit:6;
+	s32 slwr_bit:6;
+	s32 slwf_bit:6;
+	s32 drvtype_bit:6;
+	s32 drvdn_width:6;
+	s32 drvup_width:6;
+	s32 slwr_width:6;
+	s32 slwf_width:6;
 };
 
 /**