From patchwork Tue Feb 9 16:57:43 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 44939 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 45179B7D0D for ; Wed, 10 Feb 2010 04:02:54 +1100 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1NetQJ-0003Ze-Sn; Tue, 09 Feb 2010 16:58:51 +0000 Received: from mail-bw0-f220.google.com ([209.85.218.220]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1NetQ8-000351-8t for linux-mtd@lists.infradead.org; Tue, 09 Feb 2010 16:58:49 +0000 Received: by mail-bw0-f220.google.com with SMTP id 20so2398617bwz.20 for ; Tue, 09 Feb 2010 08:58:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=yISLSrCT0t+omUXagMPUhx1WCdKeii8ZFWeoyuNttEo=; b=KRew/l47fBSAx0O0DGTgqpn9Z6mA9P/odhkK1bsacmrBJ8LS0PVDfL5CsjHJ17Hgwu lgVCq4CgEojV1JDTxJlvUghmfkz5ldFArD/pCUZbPY0vAej4rTC7+zPko9sTk+oyP+UK GQA8WlBi3PFtqxhXUkIp+1iXrCw0sRS+oVHQ8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=gbGwvLvCNTNiO8kLgS35Usl3lQaA7+9wnelsP8ZuvZ8y2sEFQ03CRnd6tEVTIUJhTO enh0S9T0wIKNqp9xkXgvq7p0U1GO9RqIKbFeplUWCqSzKd9RYodaE2T110E9enHvCuyr 1xUmp8irylMvI8XzNd3KB2bgSpvRac87qx8gQ= Received: by 10.204.25.145 with SMTP id z17mr3135901bkb.181.1265734719733; Tue, 09 Feb 2010 08:58:39 -0800 (PST) Received: from localhost.localdomain (87.68.240.235.adsl.012.net.il [87.68.240.235]) by mx.google.com with ESMTPS id 16sm127734bwz.7.2010.02.09.08.58.37 (version=SSLv3 cipher=RC4-MD5); Tue, 09 Feb 2010 08:58:38 -0800 (PST) From: Maxim Levitsky To: David Woodhouse Subject: [PATCH 15/17] MTD: add few workarounds to nand system for SmartMedia/xD chips. Date: Tue, 9 Feb 2010 18:57:43 +0200 Message-Id: <1265734665-22656-16-git-send-email-maximlevitsky@gmail.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1265734665-22656-1-git-send-email-maximlevitsky@gmail.com> References: <1265734665-22656-1-git-send-email-maximlevitsky@gmail.com> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20100209_115841_040489_51D9A88E X-CRM114-Status: GOOD ( 25.86 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.2.5 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- _SUMMARY_ Cc: Maxim Levitsky , Alex Dubov , Artem Bityutskiy , joern , Vitaly Wool , linux-kernel , "stanley.miao" , linux-mtd , Thomas Gleixner X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org * Add an option NAND_SMARTMEDIA that can be set by nand driver If set, it will cause separate ID table to be used, which includes mask rom devices and new xD cards * Workaround for wrong write protect status on some xD cards Signed-off-by: Maxim Levitsky --- drivers/mtd/nand/nand_base.c | 30 ++++++++++++++++++++++-------- drivers/mtd/nand/nand_ids.c | 39 +++++++++++++++++++++++++++++++++++++++ include/linux/mtd/nand.h | 11 +++++++++++ 3 files changed, 72 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 86fa40a..09d1433 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -395,9 +395,18 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) static int nand_check_wp(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; + int wp; + + /* broken xD cards report WP despite beeing writable */ + if (chip->options & NAND_BROKEN_XD) + return 0; + /* Check the WP bit */ chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); - return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; + wp = (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; + + + return wp; } /** @@ -2651,14 +2660,18 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, } /* Lookup the flash id */ - for (i = 0; nand_flash_ids[i].name != NULL; i++) { - if (dev_id == nand_flash_ids[i].id) { - type = &nand_flash_ids[i]; +#ifdef CONFIG_MTD_NAND_SMARTMEDIA + if (chip->options & NAND_SMARTMEDIA) + type = nand_smartmedia_flash_ids; + else +#endif + type = nand_flash_ids; + + for (i = 0; type->name != NULL; type++) + if (dev_id == type->id) break; - } - } - if (!type) + if (!type->name) return ERR_PTR(-ENODEV); if (!mtd->name) @@ -3015,7 +3028,8 @@ int nand_scan_tail(struct mtd_info *mtd) /* Fill in remaining MTD driver data */ mtd->type = MTD_NANDFLASH; - mtd->flags = MTD_CAP_NANDFLASH; + mtd->flags = chip->options & NAND_ROM ? MTD_CAP_ROM : + MTD_CAP_NANDFLASH; mtd->erase = nand_erase; mtd->point = NULL; mtd->unpoint = NULL; diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 69ee2c9..f9e72d5 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -127,6 +127,45 @@ struct nand_flash_dev nand_flash_ids[] = { {NULL,} }; +#ifdef CONFIG_MTD_NAND_SMARTMEDIA +struct nand_flash_dev nand_smartmedia_flash_ids[] = { + + /* SmartMedia */ + {"SmartMedia 1MiB 5V", 0x6e, 256, 1, 0x1000, 0}, + {"SmartMedia 1MiB 3,3V", 0xe8, 256, 1, 0x1000, 0}, + {"SmartMedia 1MiB 3,3V", 0xec, 256, 1, 0x1000, 0}, + {"SmartMedia 2MiB 3,3V", 0xea, 256, 2, 0x1000, 0}, + {"SmartMedia 2MiB 5V", 0x64, 256, 2, 0x1000, 0}, + {"SmartMedia 2MiB 3,3V ROM", 0x5d, 512, 2, 0x2000, NAND_ROM}, + {"SmartMedia 4MiB 3,3V", 0xe3, 512, 4, 0x2000, 0}, + {"SmartMedia 4MiB 3,3/5V", 0xe5, 512, 4, 0x2000, 0}, + {"SmartMedia 4MiB 5V", 0x6b, 512, 4, 0x2000, 0}, + {"SmartMedia 4MiB 3,3V ROM", 0xd5, 512, 4, 0x2000, NAND_ROM}, + {"SmartMedia 8MiB 3,3V", 0xe6, 512, 8, 0x2000, 0}, + {"SmartMedia 8MiB 3,3V ROM", 0xd6, 512, 8, 0x2000, NAND_ROM}, + +#define XD_TYPEM (NAND_NO_AUTOINCR | NAND_BROKEN_XD) + /* xD / SmartMedia */ + {"SmartMedia/xD 16MiB 3,3V", 0x73, 512, 16, 0x4000, 0}, + {"SmartMedia 16MiB 3,3V ROM", 0x57, 512, 16, 0x4000, NAND_ROM}, + {"SmartMedia/xD 32MiB 3,3V", 0x75, 512, 32, 0x4000, 0}, + {"SmartMedia 32MiB 3,3V ROM", 0x58, 512, 32, 0x4000, NAND_ROM}, + {"SmartMedia/xD 64MiB 3,3V", 0x76, 512, 64, 0x4000, 0}, + {"SmartMedia 64MiB 3,3V ROM", 0xd9, 512, 64, 0x4000, NAND_ROM}, + {"SmartMedia/xD 128MiB 3,3V", 0x79, 512, 128, 0x4000, 0}, + {"SmartMedia 128MiB 3,3V ROM", 0xda, 512, 128, 0x4000, NAND_ROM}, + {"SmartMedia/xD 256MiB 3,3V", 0x71, 512, 256, 0x4000, XD_TYPEM}, + {"SmartMedia 256MiB 3,3V ROM", 0x5b, 512, 256, 0x4000, NAND_ROM}, + + /* xD only */ + {"xD 512MiB 3,3V", 0xDC, 512, 512, 0x4000, XD_TYPEM}, + {"xD 1GiB 3,3V", 0xD3, 512, 1024, 0x4000, XD_TYPEM}, + {"xD 2GiB 3,3V", 0xD5, 512, 2048, 0x4000, XD_TYPEM}, + {NULL,} +}; +EXPORT_SYMBOL(nand_smartmedia_flash_ids); +#endif + /* * Manufacturer ID list */ diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 921f24b..3fe8d9e 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -170,6 +170,12 @@ typedef enum { /* Chip does not allow subpage writes */ #define NAND_NO_SUBPAGE_WRITE 0x00000200 +/* Device is one of 'new' xD cards that expose fake nand command set */ +#define NAND_BROKEN_XD 0x00000400 + +/* Device behaves just like nand, but is readonly */ +#define NAND_ROM 0x00000800 + /* Options valid for Samsung large page devices */ #define NAND_SAMSUNG_LP_OPTIONS \ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) @@ -195,9 +201,13 @@ typedef enum { /* This option is defined if the board driver allocates its own buffers (e.g. because it needs them DMA-coherent */ #define NAND_OWN_BUFFERS 0x00040000 + /* Chip may not exist, so silence any errors in scan */ #define NAND_SCAN_SILENT_NODEV 0x00080000 +/* controller supports only xD/SmartMedia cards*/ +#define NAND_SMARTMEDIA 0x00100000 + /* Options set by nand scan */ /* Nand scan has allocated controller struct */ #define NAND_CONTROLLER_ALLOC 0x80000000 @@ -458,6 +468,7 @@ struct nand_manufacturers { }; extern struct nand_flash_dev nand_flash_ids[]; +extern struct nand_flash_dev nand_smartmedia_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);