From patchwork Sat Feb 6 16:43:40 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 44714 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 71CD8B7CE2 for ; Sun, 7 Feb 2010 04:06:05 +1100 (EST) Received: from localhost ([127.0.0.1]:52928 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ndo0O-0003K9-RF for incoming@patchwork.ozlabs.org; Sat, 06 Feb 2010 11:59:36 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Ndnlj-00072V-Q2 for qemu-devel@nongnu.org; Sat, 06 Feb 2010 11:44:28 -0500 Received: from [199.232.76.173] (port=59326 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ndnlh-000722-S6 for qemu-devel@nongnu.org; Sat, 06 Feb 2010 11:44:26 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1Ndnlg-0005AH-4d for qemu-devel@nongnu.org; Sat, 06 Feb 2010 11:44:25 -0500 Received: from mx20.gnu.org ([199.232.41.8]:39495) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Ndnlf-00051O-JN for qemu-devel@nongnu.org; Sat, 06 Feb 2010 11:44:23 -0500 Received: from hall.aurel32.net ([88.191.82.174]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NdnlD-0005k7-Rf for qemu-devel@nongnu.org; Sat, 06 Feb 2010 11:43:56 -0500 Received: from [2002:52e8:2fb:1:21e:8cff:feb0:693b] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1NdnlC-0007rA-6y; Sat, 06 Feb 2010 17:43:54 +0100 Received: from aurel32 by volta.aurel32.net with local (Exim 4.71) (envelope-from ) id 1NdnlA-00065j-Sz; Sat, 06 Feb 2010 17:43:52 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sat, 6 Feb 2010 17:43:40 +0100 Message-Id: <1265474623-23367-6-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1265474623-23367-1-git-send-email-aurelien@aurel32.net> References: <1265474623-23367-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by mx20.gnu.org: GNU/Linux 2.6 (newer, 3) X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH 5/8] target-sh4: MMU: optimize UTLB accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org With the current code, the QEMU TLB is setup to match the read/write mode of the MMU fault. This means when read access is done, the page is setup in read-only mode. When the page is later accessed in write mode, an MMU fault happened, and the page is switch in write-only mode. This flip-flop causes a lot of calls to the MMU code and slow down the emulation. This patch changes the MMU emulation, so that the QEMU TLB is setup to match the UTLB protection key. This impressively increase the speed of the emulation. Signed-off-by: Aurelien Jarno --- target-sh4/helper.c | 38 ++++++++++++++------------------------ 1 files changed, 14 insertions(+), 24 deletions(-) diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 589efe4..2d00dfa 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -386,38 +386,28 @@ static int get_mmu_address(CPUState * env, target_ulong * physical, n = find_utlb_entry(env, address, use_asid); if (n >= 0) { matching = &env->utlb[n]; - switch ((matching->pr << 1) | ((env->sr & SR_MD) ? 1 : 0)) { - case 0: /* 000 */ - case 2: /* 010 */ - n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE : - MMU_DTLB_VIOLATION_READ; - break; - case 1: /* 001 */ - case 4: /* 100 */ - case 5: /* 101 */ - if (rw == 1) - n = MMU_DTLB_VIOLATION_WRITE; - else - *prot = PAGE_READ; - break; - case 3: /* 011 */ - case 6: /* 110 */ - case 7: /* 111 */ - *prot = (rw == 1)? PAGE_WRITE : PAGE_READ; - break; - } + if (!(env->sr & SR_MD) && !(matching->pr & 2)) { + n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE : + MMU_DTLB_VIOLATION_READ; + } else if ((rw == 1) && !(matching->pr & 1)) { + n = MMU_DTLB_VIOLATION_WRITE; + } else if ((rw == 1) & !matching->d) { + n = MMU_DTLB_INITIAL_WRITE; + } else { + *prot = PAGE_READ; + if ((matching->pr & 1) && matching->d) { + *prot |= PAGE_WRITE; + } + } } else if (n == MMU_DTLB_MISS) { n = (rw == 1) ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ; } } if (n >= 0) { + n = MMU_OK; *physical = ((matching->ppn << 10) & ~(matching->size - 1)) | (address & (matching->size - 1)); - if ((rw == 1) & !matching->d) - n = MMU_DTLB_INITIAL_WRITE; - else - n = MMU_OK; } return n; }